74LVC257APW,112

74LVC257A Quad 2-input multiplexer with 5 V tolerant inputs/outputs 3-state Rev. 6 28 November 2011 Product data sheet 1. General description The 74LVC257A is a quad 2-input multiplexer with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (pin S). The data inputs from source 0 (pins 1I0 to 4I0) are selected when pin S is LOW and the data inputs from source 1 (pins 1I1 to 4I1) are selected when pin S is HIGH. Data appears at the outputs (pins 1Y to 4Y) in true (non-inverting) form from the selected inputs. The device is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to pin S. The outputs are forced to a high-impedance OFF-state when pin OE is HIGH. Inputs can be driven from either 3.3 V or 5.0 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications. 2. Features and benefits 5 V tolerant inputs/outputs, for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low-power consumption Direct interface with TTL levels Output drive capability 50 transmission lines at 85 C Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Specified from 40 C to +85 C and 40 C to +125 C74LVC257A NXP Semiconductors Quad 2-input multiplexer with 5V tolerant 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC257AD 40 Cto +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74LVC257ADB 40 Cto +125 C SSOP16 plastic shrink small outline package 16 leads SOT338-1 body width 5.3 mm 74LVC257APW 40 Cto +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74LVC257ABQ 40 Cto +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very SOT763-1 thin quad flat package no leads 16 terminals body 2.5 3.5 0.85 mm 4. Functional diagram 1 G1 15 1I0 2 EN 3 1I1 2 MUX 1 1Y 2I0 4 5 4 3 1 2Y 6 2I1 7 5 7 11 3I0 3Y 9 6 10 12 3I1 4Y 11 9 14 4I0 10 13 4I1 14 12 S OE 13 mna865 115 mna866 Fig 1. Logic diagram Fig 2. IEC logic symbol 74LVC257A All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 28 November 2011 2 of 18