74LVC1G27GW,125

74LVC1G27 Single 3-input NOR gate Rev. 4 5 May 2021 Product data sheet 1. General description The 74LVC1G27 provides one 3-input NOR function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using I . The I circuitry OFF OFF disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101-C exceeds 1000 V 24 mA output drive (V = 3.0 V) CC CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Specified from -40 C to +85 C and -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G27GW -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74LVC1G27GV -40 C to +125 C SC-74 TSOP6 plastic surface-mounted package 6 leads SOT457 74LVC1G27GM -40 C to +125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74LVC1G27GN -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74LVC1G27GS -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mmNexperia 74LVC1G27 Single 3-input NOR gate 4. Marking Table 2. Marking Type number Marking code 1 74LVC1G27GW Y7 74LVC1G27GV Y27 74LVC1G27GM Y7 74LVC1G27GN Y7 74LVC1G27GS Y7 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram B 3 A 1 1 A Y 4 1 3 Y 4 B 6 C 6 C mna937 aaa-002593 aaa-002594 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 6. Pinning information 6.1. Pinning 74LVC1G27 74LVC1G27 A 1 6 C 74LVC1G27 A 1 6 C A 1 6 C GND 2 5 V CC GND 2 5 V CC GND 2 5 V CC B 3 4 Y B 3 4 Y B 3 4 Y aaa-002596 aaa-002597 aaa-002595 Transparent top view Transparent top view Fig. 4. Pin configuration SOT363 (SC-88) and Fig. 5. Pin configuration Fig. 6. Pin configuration SOT1115 SOT457 (SC-74 TSOP6) SOT886 (XSON6) and SOT1202 (XSON6) 6.2. Pin description Table 3. Pin description Symbol Pin Description A 1 data input GND 2 ground (0 V) B 3 data input Y 4 data output V 5 supply voltage CC C 6 data input 74LVC1G27 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 4 5 May 2021 2 / 14