74LV1T125GWH

74LV1T125 Single supply translating buffer/line driver 3-state Rev. 2 3 December 2019 Product data sheet 1. General description The 74LV1T125 is a single, level translating buffer/line driver with 3-state output. The low threshold inputs support 1.8 V input logic at V = 3.3 V and can be used in 1.8 V to 3.3 V level up CC translation. In addition, the 5 V tolerant input pins enable down translation (3.3 V to 2.5 V output at V = 2.5 V). The 3-state output is controlled by the output enable input (OE). A HIGH-level at CC OE causes the output to assume a high-impedance OFF-state. The output level is referenced to the supply voltage and supports 1.8 V, 2.5 V, 3.3 V and 5.0 V CMOS levels. The wide V range CC permits the generation of output levels to connect to controllers or processors. 2. Features and benefits Single supply voltage translator at 1.8 V, 2.5 V, 3.3 V and 5.0 V Up translation 1.2 V to 1.8 V at V = 1.8 V CC 1.5 V to 2.5 V at V = 2.5 V CC 1.8 V to 3.3 V at V = 3.3 V CC 3.3 V to 5.0 V at V = 5.0 V CC Down translation 3.3 V to 1.8 V at V = 1.8 V CC 3.3 V to 2.5 V at V = 2.5 V CC 5.0 V to 3.3 V at V = 3.3 V CC 5 V tolerant inputs Latch-up performance exceeds 250 mA per JESD 78 Class II ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV CDM JESD22-C101 exceeds 1 kV Specified from -40 C to +85 C and from -40 C to +125 C 3. Applications Portable applications PC and notebooks Industrial controller TelecomNexperia 74LV1T125 Single supply translating buffer/line driver 3-state 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV1T125GW -40 C to +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm 74LV1T125GV -40 C to +125 C SC-74A plastic surface-mounted package 5 leads SOT753 74LV1T125GX -40 C to +125 C X2SON5 plastic thermal enhanced extremely thin small outline SOT1226 package no leads 5 terminals body 0.8 x 0.8 x 0.35 mm 5. Marking Table 2. Marking Type number Marking code 1 74LV1T125GW SN 74LV1T125GV SN 74LV1T125GX SN 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram 2 A Y 4 Y A 2 4 1 OE 1 EN OE mna118 mna119 mna120 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 74LV1T125 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 2 3 December 2019 2 / 14