74AUP1G374GW,125

74AUP1G374 Low-power D-type flip-flop positive-edge trigger 3-state Rev. 9 7 December 2020 Product data sheet 1. General description The 74AUP1G374 is a single D-type flip-flop positive-edge trigger (3-state). Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire V range from 0.8 V to 3.6 V. This CC device is fully specified for partial power down applications using I . The I circuitry disables OFF OFF the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 0.8 V to 3.6 V High noise immunity Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F Class 3A. Exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Low static power consumption I = 0.9 A (maximum) CC Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFF Multiple package options Specified from -40 C to +85 C and -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G374GW -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74AUP1G374GM -40 C to +125 C XSON6 plastic extremely thin small outline package no leads SOT886 6 terminals body 1 1.45 0.5 mm 74AUP1G374GN -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74AUP1G374GS -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mmNexperia 74AUP1G374 Low-power D-type flip-flop positive-edge trigger 3-state 4. Marking Table 2. Marking Type number Marking code 1 74AUP1G374GW aX 74AUP1G374GM aX 74AUP1G374GN aX 74AUP1G374GS aX 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram D D Q Q 3 D Q 4 1 C1 CP CP 1 CP 3 D 4 OE 6 EN 6 OE 001aae459 001aae457 001aae458 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 6. Pinning information 6.1. Pinning 74AUP1G374 74AUP1G374 74AUP1G374 CP 1 6 OE CP 1 6 OE CP 1 6 OE GND 2 5 V CC GND 2 5 V CC GND 2 5 V CC D 3 4 Q D 3 4 Q 001aae462 D 3 4 Q 001aae461 Transparent top view Transparent top view 001aae460 Fig. 6. Pin configuration SOT1115 Fig. 4. Pin configuration SOT363 Fig. 5. Pin configuration SOT886 and SOT1202 6.2. Pin description Table 3. Pin description Symbol Pin Description CP 1 clock input (LOW-to-HIGH, edge-triggered) GND 2 ground (0 V) D 3 data input Q 4 3-state flip-flop output V 5 supply voltage CC OE 6 output enable input (active LOW) 74AUP1G374 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 9 7 December 2020 2 / 20