Product Information

74AUP1G0832GM,115

74AUP1G0832GM,115 electronic component of Nexperia

Datasheet
AND/OR Gate Configurable 1 Circuit 3 Input (2, 1) Input 6-XSON, SOT886 (1.45x1)
Manufacturer: Nexperia
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Price (USD)

1: USD 0.4174 ea
Line Total: USD 0.42

3871 - Global Stock
Ships to you between
Tue. 28 May to Thu. 30 May
MOQ: 1  Multiples: 1
Pack Size: 1

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5442 - WHS 1


Ships to you between Wed. 22 May to Tue. 28 May

MOQ : 1
Multiples : 1
1 : USD 0.2044
10 : USD 0.2011
25 : USD 0.1979
100 : USD 0.1946
250 : USD 0.1913
500 : USD 0.1876
1000 : USD 0.1876
3000 : USD 0.1876

3871 - WHS 2


Ships to you between Tue. 28 May to Thu. 30 May

MOQ : 1
Multiples : 1
1 : USD 0.4174
10 : USD 0.3335
100 : USD 0.2633
500 : USD 0.2323
1000 : USD 0.1863
5000 : USD 0.1748
10000 : USD 0.1725
25000 : USD 0.1702
50000 : USD 0.1656

Read More Specifications

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Logic Family
Number of Gates
Number of Input Lines
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High Level Output Current
Low Level Output Current
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
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Logic Type
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Additional Infomation About Product

74AUP1G0832 Low-power 3-input AND-OR gate Rev. 6 14 January 2022 Product data sheet 1. General description The 74AUP1G0832 is a single 3-input AND-OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire V range from 0.8 V to 3.6 V. This device is fully specified CC for partial power down applications using I . The I circuitry disables the output, preventing the OFF OFF potentially damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 0.8 V to 3.6 V CMOS low power dissipation High noise immunity Overvoltage tolerant inputs to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFF Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Low static power consumption I = 0.9 A (maximum) CC Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F Class 3A exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G0832GW -40 C to +125 C TSSOP6 plastic thin shrink small outline package 6 leads SOT363-2 body width 1.25 mm 74AUP1G0832GM -40 C to +125 C XSON6 plastic extremely thin small outline package no leads SOT886 6 terminals body 1 1.45 0.5 mm 74AUP1G0832GN -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74AUP1G0832GS -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mmNexperia 74AUP1G0832 Low-power 3-input AND-OR gate 4. Marking Table 2. Marking Type number Marking code 1 74AUP1G0832GW aY 74AUP1G0832GM aY 74AUP1G0832GN aY 74AUP1G0832GS aY 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1 A 3 B 4 6 Y C 001aad943 Fig. 1. Logic symbol 6. Pinning information 6.1. Pinning 74AUP1G0832 74AUP1G0832 A 1 6 C 74AUP1G0832 A 1 6 C A 1 6 C GND 2 5 V CC GND 2 5 V CC GND 2 5 V CC B 3 4 Y B 3 4 Y B 3 4 Y 001aad941 001aad942 001aad940 Transparent top view Transparent top view Fig. 2. Pin configuration SOT363-2 Fig. 3. Pin configuration Fig. 4. Pin configuration SOT1115 (SC-88) SOT886 (XSON6) and SOT1202 (XSON6) 6.2. Pin description Table 3. Pin description Symbol Pin Description A 1 data input A GND 2 ground (0 V) B 3 data input B Y 4 data output Y V 5 supply voltage CC C 6 data input C 74AUP1G0832 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2022. All rights reserved Product data sheet Rev. 6 14 January 2022 2 / 16

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

Nexperia may also be referenced as

Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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