Product Information

74ALVC00BQ

74ALVC00BQ electronic component of Nexperia

Datasheet
IC, QUAD, 2 I/P NAND GATE, DHVQFN14

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 0.4573 ea
Line Total: USD 0.46

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - WHS 1


Ships to you between Thu. 16 May to Wed. 22 May

MOQ : 1
Multiples : 1

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74ALVC00BQ
Nexperia

1 : USD 0.1733
10 : USD 0.1015
100 : USD 0.0688
250 : USD 0.0499
500 : USD 0.043

     
Manufacturer
Product Category
Brand
Logic Family / Base Number
Logic Type
No. Of Inputs
Supply Voltage Min
Supply Voltage Max
Logic Case Style
No. Of Pins
Logic Ic Family
Logic Ic Base Number
Operating Temperature Min
Operating Temperature Max
Rohs Phthalates Compliant
Msl
Svhc
Operating Temperature Range
Supply Voltage Range
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74ALVC00 Quad 2-input NAND gate Rev. 3 16 May 2014 Product data sheet 1. General description The 74ALVC00 is a quad 2-input NAND gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. 2. Features and benefits Wide supply voltage range from 1.65 V to 3.6 V 3.6 V tolerant inputs/outputs CMOS low power consumption Direct interface with TTL levels (2.7 V to 3.6 V) Power-down mode Latch-up performance exceeds 250 mA Complies with JEDEC standards: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74ALVC00D 40 Cto +85 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74ALVC00PW 40 Cto +85 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74ALVC00BQ 40 Cto +85 C DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1 thin quad flat package no leads 14 terminals body 2.5 3 0.85 mm74ALVC00 NXP Semiconductors Quad 2-input NAND gate 4. Functional diagram 1 & 3 2 % 4 & 6 5 % 9 & 8 % 10 A 12 Y & 11 % 13 B mna246 mna211 D P Q Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram for one gate 5. Pinning information 5.1 Pinning terminal 1 index area 2 13 1B 4B 1A 1 14 V CC 1Y 3 12 4A 1B 2 13 4B 2A 4 00 11 4Y 1Y 3 12 4A 2A 4 00 11 4Y 2B 5 (1) 10 3B GND 2B 5 10 3B 2Y 6 9 3A 2Y 6 9 3A GND 7 8 3Y 001aac939 001aac938 Transparent top view (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A to 4A 1, 4, 9, 12 data input 1B to 4B 2, 5, 10, 13 data input 1Y to 4Y 3, 6, 8, 11 data output GND 7 ground (0 V) V 14 supply voltage CC 74ALVC00 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 3 16 May 2014 2 of 14 7 1 GND 1A 3Y 8 14 V CC < < < <

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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