Product Information

74AHCT374PW,112

74AHCT374PW,112 electronic component of Nexperia

Datasheet
Flip Flops OCTAL D 3-STATE
Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete

 More Buying Options & Price Grid(s)

Availability Price Quantity
0 - WHS 1

MOQ : 1
Multiples : 1
1 : USD 1.458
10 : USD 0.6816
100 : USD 0.3683
500 : USD 0.2894
1000 : USD 0.2344
1875 : USD 0.2236
11250 : USD 0.2138
26250 : USD 0.2095
N/A

Obsolete

Read More Specifications

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Number of Circuits
Logic Family
Logic Type
Polarity
Input Type
Output Type
Propagation Delay Time
High Level Output Current
Low Level Output Current
Supply Voltage - Min
Supply Voltage - Max
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Function
Height
Length
Width
Brand
Number Of Channels
Number Of Input Lines
Number Of Output Lines
Operating Supply Voltage
Product Type
Factory Pack Quantity :
Subcategory
Cnhts
Hts Code
Mxhts
Taric
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Additional Infomation About Product

74AHC374 74AHCT374 Octal D-type ip-op positive edge-trigger 3-state Rev. 03 12 June 2008 Product data sheet 1. General description The 74AHC374 74AHCT374 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specied in compliance with JEDEC standard No. 7-A. The 74AHC374 74AHCT374 comprises eight D-type ip-ops featuring separate D-type inputs for each ip-op and 3-state outputs for bus oriented applications. A clock input (CP) and an output enable input (OE) are common to all ip-ops. The eight ip-ops will store the state of their individual D inputs that meet the set-up and hold times requirements for the LOW-to-HIGH CP transition. When OE is LOW the content of the eight ip-ops is available at the outputs. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the ip-ops. 2. Features n Balanced propagation delays n All inputs have Schmitt-trigger actions n Inputs accept voltages higher than V CC n Common 3-state output enable input n Input levels: u For 74AHC374: CMOS level u For 74AHCT374: TTL level n ESD protection: u HBM EIA/JESD22-A114E exceeds 2000 V u MM EIA/JESD22-A115-A exceeds 200 V u CDM EIA/JESD22-C101C exceeds 1000 V n Multiple package options n Specied from 40- C to +85 C and from 40- C to +125 C74AHC374 74AHCT374 Nexperia Octal D-type ip-op positive edge-trigger 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC374 74AHC374D 40- C to +125 C SO20 plastic small outline package 20 leads body SOT163-1 width 7.5 mm 74AHC374PW -40 C to +125 C TSSOP20 plastic thin shrink small outline package 20 leads SOT360-1 body width 4.4 mm 74AHCT374 74AHCT374D 40- C to +125 C SO20 plastic small outline package 20 leads body SOT163-1 width 7.5 mm 74AHCT374PW -40 C to +125 C TSSOP20 plastic thin shrink small outline package 20 leads SOT360-1 body width 4.4 mm 4. Functional diagram 3 D0 Q0 2 Q1 4 D1 5 7 Q2 6 D2 Q3 8 D3 FF1 9 3-STATE to 13 D4 Q4 12 OUTPUTS FF8 14 D5 Q5 15 17 Q6 16 D6 18 D7 Q7 19 CP 11 1 OE mna892 Fig 1. Functional diagram 74AHC AHCT374 3 Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 03 12 June 2008 2 of 17

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

Nexperia may also be referenced as

Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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