Product Information

74AHCT257D,112

74AHCT257D,112 electronic component of Nexperia

Datasheet
NXP Semiconductors Encoders, Decoders, Multiplexers & Demultiplexers 8-BIT ADDRSSBL LATCH

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete
Availability Price Quantity
0 - WHS 1

MOQ : 1
Multiples : 1

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74AHCT257D,112
Nexperia

1 : USD 1.6311
10 : USD 0.7675
100 : USD 0.4163
500 : USD 0.3273
1000 : USD 0.2517
2500 : USD 0.2299
5000 : USD 0.2165
N/A

Obsolete
     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
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Logic Family
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Number of Output Lines
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Supply Voltage - Min
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Maximum Operating Temperature
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Cnhts
High Level Output Current
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Mxhts
Operating Supply Voltage
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Subcategory
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74AHC257 74AHCT257 Quad 2-input multiplexer 3-state Rev. 02 9 May 2008 Product data sheet 1. General description The 74AHC257 74AHCT257 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specied in compliance with JEDEC standard No. 7-A. The 74AHC257 74AHCT257 has four identical 2-input multiplexers with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (S). The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data inputs from source 1 (1I1 to 4I1) are selected when input S is HIGH. Data appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs. The 74AHC257 74AHCT257 is the logic implementation of a 4-pole 2-position switch, where the position of the switch is determined by the logic levels applied to input S. The outputs are forced to a high-impedance OFF-state when OE is HIGH. The logic equations for the outputs are: 1Y = OE (1I1 S + 1I0 S) 2Y = OE (2I1 S + 2I0 S) 3Y = OE (3I1 S + 3I0 S) 4Y = OE (4I1 S + 4I0 S) The 74AHC257 74AHCT257 is identical to the 74AHC258 74AHCT258, but has non-inverting (true) outputs. 2. Features n Balanced propagation delays n All inputs have Schmitt-trigger actions n Non-inverting data path n Inputs accept voltages higher than V CC n Input levels: u For 74AHC257: CMOS level u For 74AHCT257: TTL level n ESD protection: u HBM EIA/JESD22-A114E exceeds 2000 V u MM EIA/JESD22-A115-A exceeds 200 V u CDM EIA/JESD22-C101C exceeds 1000 V n Multiple package options n Specied from -40 C to +85 C and from 40- C to +125 C74AHC257 74AHCT257 Nexperia Quad 2-input multiplexer 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC257 74AHC257D 40- C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74AHC257PW 40- C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74AHCT257 74AHCT257D -40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74AHCT257PW -40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 4. Functional diagram 2 3 5 6 11 10 14 13 1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 1 S SELECTOR 15 OE 3-STATE MULTIPLEXER OUTPUTS 1Y 2Y 3Y 4Y 4 7 9 12 mgr280 Fig 1. Functional diagram 74AHC AHCT257 2 Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 02 9 May 2008 2 of 16

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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