74AHC86PW,118

74AHC86 74AHCT86 Quad 2-input EXCLUSIVE-OR gate Rev. 3 5 June 2020 Product data sheet 1. General description The 74AHC86 74AHCT86 is a quad 2-input EXCLUSIVE-OR gate. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. 2. Features and benefits Wide supply voltage range from 2.0 V to 5.5 V Input levels: For 74AHC86: CMOS level For 74AHCT86: TTL level Balanced propagation delays All inputs have Schmitt-trigger actions Overvoltage tolerant inputs to 5.5 V High noise immunity CMOS low power dissipation ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 V Latch-up performance exceeds 100 mA per JESD 78 Class II Level A Multiple package options Specified from -40 C to +85 C and from -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC86D -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74AHCT86D 74AHC86PW -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74AHCT86PW 74AHC86BQ -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal SOT762-1 enhanced very thin quad flat package no leads 74AHCT86BQ 14 terminals body 2.5 3 0.85 mmNexperia 74AHC86 74AHCT86 Quad 2-input EXCLUSIVE-OR gate 4. Functional diagram 1 1A 1Y 3 2 1B 4 2A 2Y 6 5 2B 9 3A 3Y 8 10 3B 12 4A 4Y 11 13 4B mna787 Fig. 1. Logic symbol 1 =1 3 2 4 =1 6 5 9 =1 8 10 A 12 Y =1 11 13 B mna788 mna786 Fig. 2. Logic diagram (one gate) Fig. 3. IEC logic symbol 74AHC AHCT86 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 5 June 2020 2 / 14