SY88993ALKG

SY88993AL 3.3V 3.2Gbps High-Speed Limiting Post Amplifier with High Input Sensitivity General Description Features The SY88993AL limiting post amplifier, with its wide Up to 3.2Gbps operation bandwidth, is ideal for use as a post amplifier in fiber-optic Low noise CML data outputs receivers with data rates up to 3.2Gbps. Signals as small Chatter-Free LOS generation as 4mV can be amplified to drive devices with CML PP Open Collector TTL LOS output inputs or AC-coupled PECL inputs. The SY88993AL generates a chatter-free Loss-of-Signal (LOS) open TTL /EN Input collector TTL output using an external resistor, as shown Differential PECL inputs for data Figure 1. Single 3.3V power supply The SY88993AL incorporates a programmable level detect Available in a tiny 10-pin (3mm x 3mm) MSOP function to identify when the input signal has been lost. This information can be fed back to the /EN input of the Applications device to maintain stability under loss of signal conditions. Using LOS pin the sensitivity of the level detect can be PON LVL SFP/SFF/GBIC optical transceivers adjusted. The LOS voltage can be set by connecting a LVL Gigabit Ethernet resistor divider between V and V , Figure 5. CC REF 1X and 2X Fibre Channel Datasheets and support documentation can be found on SONET/SDH: OC 3/12/24/48 STM 1/4/8/16 Micrels web site at: www.micrel.com. Line driver and line receiver Markets FTTX Datacom/Telecom Figure 1. LOS resistor configuration LVL Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. SY88993AL Block Diagram Detailed Description The SY88993AL is a high-sensitivity limiting post resistor, as shown in Figure 1. LOS is used to determine amplifier that operates from a single +3.3V power that the input amplitude is large enough to be considered o o supply, over temperatures from 40 C to +85 C. Signals a valid input. LOS asserts high if the input amplitude falls with data rates up to 3.2Gbps and as small as 4mV below the threshold sets by LOS and de-asserts low PP LVL can be amplified. Figure 2 shows the allowed input otherwise. LOS can be fed back to the enable bar (/EN) voltage swing. The SY88993AL generates a LOS output. input to maintain output stability under a loss of signal LOS sets the sensitivity of the input amplitude condition. /EN de-asserts the true output signal without LVL detection. removing the input signals. Typically, 5.6dB LOS hysteresis is provided to prevent chattering. Input Amplifier/Buffer Loss-of-Signal Level Set Figure 3 shows a simplified schematic of the SY88993ALs input stage. The high-sensitivity of the The SY88993AL incorporates a programmable level input amplifier allows signals as small as 4mV to be detect function to identify when the input signal has been PP detected and amplified. The input amplifier also allows lost. This information can be fed back to the /EN input of input signals as large as 1800mV . Input signals below the device to maintain stability under loss of signal PP 6mVpp are linearly amplified with a typical 38dB conditions. Using LOS pin the sensitivity of the level LVL differential voltage gain. Since it is a limiting amplifier, detect can be adjusted. The LOS voltage can be set LVL the SY88993AL outputs typically 800mV voltage- by connection a resistor divider between V and V , PP CC REF limited waveforms for input signals that are greater than Figure 5. 10mV . Applications requiring the SY88993AL to PP Hysteresis operate with high-gain should have the upstream TIA placed as close as possible to the SY88993ALs input The SY88993AL typically provides 5.6dB LOS electrical pins to ensure the best performance of the device. hysteresis. By definition, a power ratio measured in dB is 2 10log (power ratio). Power is calculated as V /R for an IN Output Buffer electrical signal. Hence, the same ratio can be stated as The SY88993ALs CML output buffer is designed to 20log (voltage ratio). While in linear mode, the electrical drive 50 lines. The output buffer requires appropriate voltage input changes linearly with the optical power and termination for proper operation. An external 50 therefore, the ratios change linearly. Thus, the optical resistor to V for each output pin provides this. Figure 4 hysteresis in dB is half the electrical hysteresis in dB CC shows a simplified schematic of the output stage. given in the data sheet. Since the SY88993AL is an electrical device, this data sheet refers to hysteresis in Loss-of-Signal electrical terms. With 5.6dB LOS hysteresis, a voltage factor of about 2 is required to assert or de-assert LOS. The SY88993AL generates a chatter-free LOS open- collector TTL output which requires an external pull-up M9999-093008-A September 2008 2 hbwhelp micrel.com or (408) 955-1690