PIC16F19185T-I/PT

PIC16(L)F19155/56/75/76/85/86 Full-Featured 28/40/44/48-Pin Microcontrollers Description PIC16(L)F19155/56/75/76/85/86 microcontrollers offer eXtreme Low-Power (XLP) LCD drive coupled with Core Independent Peripherals (CIPs) and Intelligent Analog. They are especially suited for battery-powered LCD applications due to an integrated charge pump, high current I/O drive for backlighting, and battery backup of the Real-Time Clock/ Calendar (RTCC). Active clock tuning of the HFINTOSC provides a highly accurate clock source over voltage and temperature. The family also features a new 12-bit ADC controller which can automate Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and automatic threshold comparison. Other new features include low-power IDLE and DOZE modes, Device Information Area (DIA), and Memory Access Partition (MAP). These low-power products are available in 28/40/44 and 48 pins to support the customer in various LCD and general purpose applications. Core Features Operating Characteristics C Compiler Optimized RISC Architecture Operating Voltage Range: Operating Speed: - 1.8V to 3.6V (PIC16LF19155/56/75/76/85/ - DC 32 MHz clock input 86) - 125 ns minimum instruction cycle - 2.3V to 5.5V (PIC16F19155/56/75/76/85/86) Interrupt Capability Temperature Range: 16-Level Deep Hardware Stack - Industrial: -40C to 85C Timers: - Extended: -40C to 125C - Two 8-bit (TMR2/4) Timer with Hardware Limit Timer Extension (HLT) Power-Saving Functionality - 16-bit (TMR0/1) DOZE mode: Ability to run CPU core slower than Low-Current Power-on Reset (POR) the system clock Configurable Power-up Timer (PWRTE) IDLE mode: Ability to halt CPU core while internal Brown-out Reset (BOR) with Fast Recovery peripherals continue operating Low-Power BOR (LPBOR) Option Sleep mode: Lowest power consumption Windowed Watchdog Timer (WWDT): Peripheral Module Disable (PMD): Ability to - Variable prescaler selection disable hardware module to minimize power - Variable window size selection consumption of unused peripherals - All sources configurable in hardware or software Programmable Code Protection eXtreme Low-Power (XLP) Features Sleep mode: 50 nA 1.8V, typical Memory Watchdog Timer: 500 nA 1.8V, typical Secondary Oscillator: 500 nA 32 kHz Up to 16kW/28KB Flash Program Memory Operating Current: Up to 2KB Data SRAM Memory - 8 A 32 kHz, 1.8V, typical 256 bytes DataEE - 32 A/MHz 1.8V, typical Direct, Indirect and Relative Addressing modes Memory Access Partition (MAP): - Bootloader write-protect Digital Peripherals -Custom partition LCD Controller: Device Information Area (DIA): - Up to 248 segments - Temp sensor factory calibrated data - Charge pump for low-voltage operation - Fixed Voltage Reference - Contrast control - Device ID Four Configurable Logic Cell Modules (CLC): - Integrated combinational and sequential logic 2017 Microchip Technology Inc. Preliminary DS40001923A-page 1PIC16(L)F19155/56/75/76/85/86 Complementary Waveform Generator (CWG): Flexible Oscillator Structure - Rising and falling edge dead-band control High-Precision Internal Oscillator: - Full-bridge, half-bridge, 1-channel drive - Active Clock Tuning of HFINTOSC over - Multiple signal sources voltage and temperature (ACT) Two Capture/Compare/PWM (CCP) module - Selectable frequency range up to 32 MHz Two 10-Bit PWMs 1% typical Peripheral Pin Select (PPS): x2/x4 PLL with Internal and External Sources - Enables pin mapping of digital I/O Low-Power Internal 31 kHz Oscillator Communication: (LFINTOSC) - Two EUSART, RS-232, RS-485, LIN External 32 kHz Crystal Oscillator (SOSC) compatible 2 C, SMBus, PMBus compatible - Oscillator Start-up Timer (OST) - One SPI/I Up to 43 I/O Pins: - Ensures stability of crystal oscillator source - Individually programmable pull-ups External Oscillator Block with: - Slew rate control - Three external clock modes up to 32 MHz - Interrupt-on-change with edge-select Fail-Safe Clock Monitor: - Input level selection control (ST or TTL) - Allows for safe shutdown if peripherals clock - Digital open-drain enable stops Analog Peripherals Analog-to-Digital Converter with Computation 2 (ADC ): - 12-bit with up to 39 external channels - Automates math functions on input signals: averaging, filter calculations, oversampling and threshold comparison - Conversion available during Sleep Two Comparators: - (1) Low-Power Clocked Comparator - (1) High-Speed Comparator - Fixed Voltage Reference at (non)inverting input(s) - Comparator outputs externally accessible 5-Bit Digital-to-Analog Converter (DAC): - 5-bit resolution, rail-to-rail - Positive Reference Selection - Unbuffered I/O pin output - Internal connections to ADCs and comparators Voltage Reference: - Fixed Voltage Reference with 1.024V, 2.048V and 4.096V output levels Zero-Cross Detect Module: - AC high-voltage zero-crossing detection for simplifying TRIAC control - Synchronized switching control and timing 2017 Microchip Technology Inc. Preliminary DS40001923A-page 2