Product Information

MT9122AP1

MT9122AP1 electronic component of Microchip

Datasheet
Telecom Interface ICs Pb Free DUAL VOICE ECHO CANCELLER W/TD

Manufacturer: Microchip
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1: USD 15.5043 ea
Line Total: USD 15.5

81 - Global Stock
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MT9122AP1
Microchip

1 : USD 22.8262
10 : USD 22.4879
37 : USD 21.9038
111 : USD 21.3941

81 - WHS 2


Ships to you between Thu. 23 May to Mon. 27 May

MOQ : 1
Multiples : 1

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MT9122AP1
Microchip

1 : USD 15.5043
111 : USD 15.4922
5032 : USD 15.4802

     
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MT9122 Dual Voice Echo Canceller with Tone Detection Data Sheet September 2005 Features Dual channel 64 ms or single channel 128 ms Ordering Information echo cancellation MT9122AE 28 Pin PDIP Tubes MT9122AP 28 Pin PLCC Tubes Conforms to ITU-T G.165 requirements MT9122APR 28 Pin PLCC Tape & Reel ITU-T G.165/G.164 disable tone detection MT9122AP1 28 Pin PLCC* Tubes supported on all audio paths MT9122APR1 28 Pin PLCC* Tape & Reel *Pb Free Matte Tin Narrow-band signal detection -40C to +85C Programmable double-talk detection threshold Non-linear processor with adaptive suppression Applications threshold and comfort noise insertion Offset nulling of all PCM channels Wireless Telephony Trunk echo cancellers Controllerless mode or Controller mode with serial interface Description ST-BUS or variable-rate SSI PCM interfaces The MT9122 Voice Echo Canceller implements a Selectable /A-Law ITU-T G.711 /A-Law Sign cost effective solution for telephony voice-band echo Mag linear 2s complement cancellation conforming to ITU-T G.165 Per channel selectable 12 dB attenuator requirements. The MT9122 architecture contains two Transparent data transfer and mute option echo cancellers which can be configured to provide dual channel 64 millisecond echo cancellation or 19.2 MHz master clock operation single channel 128 millisecond echo cancellation. The MT9122 supports ITU-T G.165 or G.164 tone disable requirements. Linear/ Non-Linear Offset Linear/ Sin + Sout /A-Law Processor Null /A-Law - Microprocessor Disable Tone Interface Detector Double-Talk Detector Programmable Bypass Narrow-Band Disable Tone Detector Detector 12dB Offset Linear/ Linear/ Rin Rout Attenuator Null /A-Law /A-Law ENA1 ENA2 ENB1 ENB2 CONFIG1 NLP Echo Canceller A CONFIG2 REV LAW S1/DATA1 S2/DATA2 FORMAT Echo Canceller B S3/CS TD1 TD2 S4/SCLK VDD VSS PWRDN IC F0od F0i BCLK/C4i MCLK Figure 1 - Functional Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 1996-2005, Zarlink Semiconductor Inc. All Rights Reserved. Adaptive Filter ControlMT9122 Data Sheet The MT9122 operates in two major modes: Controller or Controllerless. Controller mode allows access to an array of features for customizing the MT9122 operation. Controllerless mode is for applications where default register settings are sufficient. ENA1 1 CONFIG2 28 2 ENB1 CONFIG1 27 3 ENA2 BCLK/C4i 26 4 ENB2 25 F0i Rin F0i 5 25 5 Rin 24 Rout Sin 6 24 Rout Sin 6 PDIP 23 Sout 7 23 Sout VSS 7 VSS VDD 22 8 PLCC 22 VDD MCLK 8 IC 9 21 F0od MCLK 21 F0od 9 NLP 10 20 S1/DATA1 IC 20 S1/DATA1 REV 11 19 S2/DATA2 10 S2/DATA2 NLP 19 11 S3/CS REV 18 12 LAW 17 S4/SCLK 13 FORMAT 16 TD1 14 15 PWRDN TD2 Figure 2 - Pin Connections Pin Description Pin Name Description 1 ENA1 SSI Enable Strobe / ST-BUS Mode for Rin/Sout (Input). This pin has dual functions depending on whether SSI or ST-BUS is selected. For SSI, this strobe must be present for frame synchronization. This is an active high channel enable strobe, 8 or 16 data bits wide, enabling serial PCM data transfer for Echo Canceller A on Rin/Sout pins. Strobe period is 125 microseconds. For ST-BUS, this pin, in conjunction with the ENB1 pin, will select the proper ST-BUS mode for Rin/Sout pins (see ST-BUS Operation description). The selected mode applies to both Echo Canceller A and B. 2 ENB1 SSI Enable Strobe / ST-BUS Mode for Rin/Sout (Input).This pin has dual functions depending on whether SSI or ST-BUS is selected. For SSI, this is an active high channel enable strobe, 8 or 16 data bits wide, enabling serial PCM data transfer for Echo Canceller B on Rin/Sout pins. Strobe period is 125 microseconds. For ST-BUS, this pin, in conjunction with the ENA1 pin, will select the proper ST-BUS mode for Rin/Sout pins (see ST-BUS Operation description). The selected mode applies to both Echo Canceller A and B. 3 ENA2 SSI Enable Strobe / ST-BUS Mode for Sin/Rout (Input).This pin has dual functions depending on whether SSI or ST-BUS is selected. For SSI, this is an active high channel enable strobe, 8 or 16 data bits wide, enabling serial PCM data transfer for Echo Canceller A on Sin/Rout pins. Strobe period is 125 microseconds. For ST-BUS, this pin, in conjunction with the ENB2 pin, will select the proper ST-BUS mode for Sin/Rout pins (see ST-BUS Operation description). The selected mode applies to both Echo Canceller A and B. 2 Zarlink Semiconductor Inc. 12 4 13 3 4 1 2 15 1 16 28 17 27 18 26 LAW ENB2 FORMAT ENA2 PWRDN ENB1 TD2 ENA1 TD1 CONFIG2 S4/SCLK CONFIG1 S3/CS BCLK/C4i

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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