MEC1609-PZP

MEC1609/MEC1609i Mixed Signal Mobile Embedded Flash ARC EC BC-Link/ VLPC Base Component - Embedded Memory Interface Product Features Host Serial or Parallel IRQ Source 3.3V Operation Provides Two Windows to On-Chip SRAM for ACPI Compliant Host Access Two Register Mailbox Command Interface LPC Interface Host Access of Virtual Registers Without EC - LPC I/O and Trusted Cycles Decoded Intervention VTR (standby) and VBAT (Power Planes) - Mailbox Registers Interface - Low Standby Current in Sleep Mode Thirty-two 8-Bit Scratch Registers Configuration Register Set Two Register Mailbox Command Interface Two Register SMI Source Interface - Compatible with ISA Plug-and-Play Standard - ACPI Embedded Controller Interface - EC-Programmable Base Address Four Instances ARC-625D Embedded Controller (EC) 1 or 4 Byte Data transfer capable - 16 KB Single Cycle 32-bit Wide Dual-ported - ACPI Power Management Interface SRAM, Accessible as Closely Coupled Data SCI Event-Generating Functions Memory and Instruction Memory Battery Backed Resources - 2 KB Instruction Cache and AHB Memory- - Power-Fail Status Register mapped SPI Flash Read Controller - 32 KHz Clock Generator - 32 x 32 x 64 Fast Multiply - Week Alarm Timer Interface with Program- - Divide Assist and Saturation Arithmetic mable Wake-up from 1ms to 45 Days - Maskable Interrupt Aggregator/Accelerator - VBAT-Powered Control Interface Interface - VBAT-Backed 64 Byte Memory - Maskable Hardware Wake-Up Events Three EC-based SMBus 2.0 Host Controllers - Sleep mode - Allows Master or Dual Slave Operation - JTAG Debug Port, Includes JTAG Master - Controllers are Fully Operational on Standby - MCU Serial Debug Port Power - 8-Channel DMA Interface Supports SMBus 2 - DMA-driven I C Network Layer Hardware Controllers and EC/Host GP-SPI Controllers 2 -I C Datalink Compatibility Mode Embedded Flash - Multi-Master Capable - 192 KB user space + 2kB info block, 32-bit Access, 35ns Access Time, 1 K Cycles - Supports Clock Stretching Endurance - Programmable Bus Speeds - Programmable by LPC, EC and JTAG Inter- - 400 KHz Capable faces - Hardware Bus Access Fairness Interface - Flash Security Enhancements - SMBus Time-outs Interface 4K Boot Block Protection - 8 x 3 x 3 Port Multiplexing Direct JTAG and Direct LPC-protected (2) Pages PECI Interface 2.0 at or Near Top of Memory for Password Protection 18 x 8 Interrupt Capable Multiplexed Keyboard Legacy Support Scan Matrix Three independent Hardware Driven PS/2 Ports - Fast GATEA20 & Fast CPU RESET - Fully functional on Main and/or Suspend System to EC Message Interface Power - 8042 Style Host Interface - PS/2 Edge Wake Capable 115 General Purpose I/O Pins - 8 GPIO Pass-Through Port (GPTP) 2009-2017 Microchip Technology Inc. DS00002485A-page 1MEC1609/MEC1609i 3-pin LED Interface Two Pin Debug Port with Standard 16C550A Reg- ister Interface - Programmable Blink Rates - Accessible from Host and EC - Breathing LED Output - Programmable Input/output Pin Polarity - Operational in EC Sleep State Inversion Programmable 16-bit Counter/Timer Interface - Programmable Main Power or Standby - Four Wake-capable 16-bit Auto-reloading Power Functionality Counter/Timer Instances - Standard Baud Rates to 115.2 Kbps, Custom - Four Operating Modes per Instance: Timer, Baud Rates to 2 Mbps One-shot, Event and Measurement. Resistor/Capacitor Identification Detection - 4 External Inputs, 4 External Outputs (RC ID) Hibernation Timer Interface - Single Pin Interface to External Inexpensive - Two 32.768 KHz Driven Timers RC Circuit - Programmable Wake-up from 0.5ms to 128 - Replacement for Multiple GPIOs Minutes - Provides 8 Quantized States on One Pin System Watch Dog Timer (WDT) Integrated Standby Power Reset Generator Input Capture and Compare Timer Clock Generator - 32-bit Free-running timer - 32.768 KHz-input Clock - Six 32-bit Capture Registers - operational on Suspend Power - Two 32-bit Compare Registers - Programmable Clock Power Management - Capture, Compare and Overflow Interrupts Control & Distribution Microchips Multipoint VLPC Serial Interconnect - 64.52 MHz 2% Accuracy Bus Master Packages: - Forwards LPC transactions to VLPC periph- - 144 Pin LFBGA RoHS Compliant package erals - 144 Pin TFBGA RoHS Compliant package - Forwards ARC transactions to VLPC periph- Operating Temperature erals - The MEC1609 supports the commercial tem- BC-Link Interconnection Bus o o perature range of 0 C to +70 C - Three High Speed and one Low Speed Bus - The MEC1609i supports the industrial tem- Masters Controllers o o perature range of -40 C to +85 C Two General Purpose Serial Peripheral Interface Controllers (ECGP-SPI) - One 3-pin EC-driven Full Duplex Serial Com- munication Interface - One 4-pin EC/Host-driven Full Duplex Serial Communication Interface to SPI Flash Inter- face - Flexible Clock Rates - SPI Burst Capable SPI Flash Read Controller - 4 MB AHB Memory-Mapped address space - Supports 2 KB EC Instruction Cache FAN Support - 8 Programmable Pulse-Width Modulator Out- puts Multiple Clock Rates 16-Bit On & 16-Bit Off Counters - Four Fan Tachometer Inputs - 6 x 2 Capture/Compare Timer Interface ADC Interface - 10-bit Conversion in 10 s - 16 Channels - Integral Non-Linearity of 0.5 LSB Differen- tial Non-Linearity of 0.5 LSB DS00002485A-page 2 2009-2017 Microchip Technology Inc.