MCP23017/MCP23S17 16-Bit I/O Expander with Serial Interface Configurable Interrupt Source: Features - Interrupt-on-change from configured register 16-Bit Remote Bidirectional I/O Port: defaults or pin changes - I/O pins default to input Polarity Inversion Register to Configure the 2 High-Speed I C Interface (MCP23017): Polarity of the Input Port Data -100kHz External Reset Input -400kHz Low Standby Current: 1 A (max.) -1.7MHz Operating Voltage: High-Speed SPI Interface (MCP23S17): - 1.8V to 5.5V -40C to +85C - 10 MHz (maximum) - 2.7V to 5.5V -40C to +85C Three Hardware Address Pins to Allow Up to - 4.5V to 5.5V -40C to +125C Eight Devices On the Bus Configurable Interrupt Output Pins: Packages - Configurable as active-high, active-low or 28-pin QFN, 6 x 6 mm Body open-drain 28-pin SOIC, Wide, 7.50 mm Body INTA and INTB Can Be Configured to Operate 28-pin SPDIP, 300 mil Body Independently or Together 28-pin SSOP, 5.30 mm Body Package Types MCP23017 MCP23S17 GPB0 1 28 GPA7 1 28 GPA7 GPB0 2 27 GPA6 GPB1 2 27 GPA6 GPB1 3 26 GPA5 GPB2 GPB2 3 26 GPA5 GPB3 4 25 GPA4 GPB3 4 25 GPA4 GPB4 5 24 GPA3 5 24 GPA3 GPB4 6 23 GPA2 GPB5 6 23 GPA2 GPB5 SOIC 7 22 GPA1 GPB6 7 22 GPA1 GPB6 8 21 GPA0 GPB7 SPDIP 8 21 GPA0 GPB7 V 9 20 INTA DD V 9 20 SSOP INTA DD V 10 19 SS INTB V 10 19 SS INTB NC 11 18 RESET 11 18 CS RESET SCK 12 17 A2 12 17 SCK A2 13 16 SDA A1 13 16 SI A1 14 15 NC A0 14 15 SO A0 28272625242322 28272625242322 1 21 GPA4 GPB4 1 21 GPA4 GPB4 GPA3 GPA3 2 20 2 20 GPB5 GPB5 3 19 GPA2 3 19 GPA2 GPB6 GPB6 QFN EP EP GPA1 4 18 GPA1 4 18 GPB7 GPB7 29 * 29 * V DD 5 17 GPA0 V 5 17 GPA0 DD V INTA INTA SS 6 16 V 6 16 SS 15 INTB 15 INTB NC 7 7 CS 8 9 1011121314 8 9 1011121314 * Includes Exposed Thermal Pad see Table 2-1. 2005-2016 Microchip Technology Inc. DS20001952C-page 1 SCK GPB3 SDA GPB2 NC GPB1 A0 GPB0 A1 GPA7 A2 GPA6 RESET GPA5 SCK GPB3 SI GPB2 SO GPB1 A0 GPB0 A1 GPA7 A2 GPA6 RESET GPA5MCP23017/MCP23S17 Functional Block Diagram MCP23S17 CS SCK SI SPI SO MCP23017 GPB7 Serializer/ SCL GPB6 2 I C Deserializer SDA GPB5 GPB4 3 GPIO GPB3 A2:A0 Decode GPB2 RESET GPB1 Control GPB0 16 INTA Interrupt INTB Logic GPA7 GPA6 8 GPA5 GPA4 GPIO GPA3 GPA2 Configuration/ Control GPA1 Registers GPA0 DS20001952C-page 2 2005-2016 Microchip Technology Inc.