HV3418PG-G

HV3418 64-Channel Serial-to-Parallel Converter with High-Voltage Push-Pull Outputs Features General Description Up to 180V Output Voltage The HV3418 is a low-voltage serial-to-high-voltage parallel converter with push-pull outputs. This device Low-power Level Shifting has been designed as a printer driver for inkjet Shift Register Speed: applications. It can also be used in any application - 6 MHz at V = 5V DD requiring multiple-output high-voltage low-current - 12 MHz at V = 12V DD sourcing-and-sinking capabilities. Latched Data Outputs The device consists of a 64-bit Shift register, Output Polarity and Blanking 64 latches and control logic to perform the polarity CMOS-compatible Inputs select and blanking of the outputs. A DIR pin controls the direction of data shift through the device. With the Forward and Reverse Shifting Options DIR grounded, D A is data in and D B is data out. IO IO Data is shifted from HV 64 to HV 1. When DIR is OUT OUT Applications at logic high, D B is data in and D A is data out. IO IO Display Driver The data is then shifted from HV 1 to HV 64. The OUT OUT data is shifted through the Shift register on the Print Head Driver low-to-high transition of the clock. Data output buffers MEMS Applications are provided for cascading devices. The operation of the shift register is not affected by the latch enable (LE), blanking (BL) and the polarity (POL) inputs. The transfer of data from the Shift register to the latch occurs when the LE is high. The data in the latch is stored during LE transition from high to low. Package Type 80-lead PQFP (Top view) 80 1 See Table 2-1 for pin information. 2017-2018 Microchip Technology Inc. DS20005843B-page 1HV3418 Functional Block Diagram POL BL VPP LE D A HV 1 IO OUT CLK HV 2 OUT 64 bit 60 Additional 64 Latches Static Shift Outputs DIR Register HV 63 OUT HV 64 OUT D B IO DS20005843B-page 2 2017-2018 Microchip Technology Inc.