AN1416 Low-Power Design Guide Main Sources of Power Consumption Authors: Brant Ivey Microchip Technology Inc. In CMOS devices, such as microcontrollers, the total power consumption can be broken down into two broad categories: dynamic power and static power. Dynamic INTRODUCTION power is the power consumed when the microcontroller Low-power applications represent a significant portion is running and performing its programmed tasks. Static of the future market for embedded systems. Every power is the power consumed, when not running code, year, more designers are required to make designs that occurs simply by applying voltage to a device. portable, wireless and energy efficient. This document DYNAMIC POWER seeks to simplify the transition to low-power applica- tions by providing a single location for the foundations Dynamic power consumption is the current which is of low-power design for embedded systems. The consumed during the normal operation of an MCU. It examples discussed in this document will focus on includes the power lost in switching CMOS circuits and power consumption from the viewpoint of the microcon- the bias currents for the active analog circuits of the troller (MCU). As the brain of the application, the MCU device, such as A/Ds or oscillators. typically consumes the most power and has the most To understand where switching losses originate from, control over the system power consumption. consider a CMOS inverter, as shown in Figure 1. As with all designs, it is important for the designer of a low-power embedded system to consider trade-offs FIGURE 1: CMOS INVERTER DYNAMIC between power consumption, and other factors, such as POWER CONSUMPTION cost, size and complexity. While some low-power tech- PATHS niques can be used with no cost to the system, others may require trade-offs. This guide will give examples of these trade-offs where applicable. However, it is not VDD feasible to discuss all possible trade-offs, so an embed- ded designer should keep in mind the possible system level impacts of power-saving techniques. Input Output This design guide will refer to Low-Power modes available on PIC MCUs, but will not go into detail about these features. For information about the Low-Power modes available on PIC MCU devices, refer to AN1267, nanoWatt and nanoWatt XLP Technologies: An Introduction to Microchips Low-Power Devices (DS01267). This inverter will consume little to no power when the input is at VDD or VSS. However, when the signal LOW-POWER BASICS switches from VDD to VSS, there is a transition period The definition of low power varies significantly from where the PMOS and NMOS will both be biased in the application to application. In some systems, there is linear region, allowing current to flow from VDD to plenty of energy available to run from, but the ground. Also note, in a real system there is some low-power designer is attempting to minimize operating amount of load capacitance on the output bus. There is costs or maximize efficiency. While in other applica- additional current consumption associated with the tions, there may be a limited power supply, such as a charging and discharging of this bus capacitance when coin cell battery, which determines the power con- the logic level changes. sumption requirements of the system. These systems require different focuses to minimize power. It is impor- tant to consider and understand what causes power consumption and where to focus power minimization efforts to create an effective low-power system. 2011 Microchip Technology Inc. DS01416A-page 1AN1416 The average power consumed by dynamic switching would increase system cost. Interestingly, in some losses of a single gate can be defined by the following cases, it can be more power efficient to run at a higher equation: voltage if it allows for the removal of a regulator. In this case, the power lost in the regulator is higher than the EQUATION 1: DYNAMIC POWER increase in dynamic current from operating at a higher CONSUMPTION voltage. 2 Frequency is typically the most variable of the factors P = V f C contributing to dynamic power, and as such, is usually the component adjusted by embedded designers to Where V is the system voltage, f is the switching actively control power consumption. The optimal frequency and C is the load capacitance. operating frequency for a system is determined by a Note that this equation is for a single CMOS device, not combination of factors: the entire MCU. When considering the entire MCU, this Communications or sampling speed requirements equation will be multiplied by a scaling factor ( ), which varies depending on the switching frequency of all of Processing performance the gates in the device. Maximum peak current allowed Equation 1 reveals a few important points to consider As the power equation indicates, lower frequencies will about how to control dynamic power consumption. The result in lower dynamic current. However, it is important first point to consider is that voltage is the most significant to keep in mind that execution speed is also a factor in factor in dynamic power consumption because the power consumption. In some cases, it may be optimal to voltage term is squared. Reducing the system operating run at a higher frequency and finish an operation more voltage will have a significant impact on power consump- quickly to allow the system to return to Sleep for minimal tion. Another major consideration is which of these power use. Also, consider that at low frequencies, components can be modified in a system. Every dynamic switching current may no longer dominate embedded system has different requirements which system power consumption. Instead, the static power will limit the ability of a designer to adjust the voltage, consumption used in biasing the analog circuits on the frequency or load capacitance. MCU will dominate. This can limit the effectiveness of reducing frequency as a power-saving technique. At this For example, the embedded system designer has point, the designer should focus on techniques to reduce limited control over C, the internal load capacitance. static power. The capacitance is a function of the internal MCU lay- out and design. It is up to the MCU manufacturer to limit STATIC POWER the switching of load capacitance by utilizing proper low-power IC design techniques, such as properly gat- Static power consumption encompasses all of the ing clock signals. The only control the system designer power required to maintain proper system operation has over internal load capacitance is the ability to while code is not actively running. This typically enable and disable MCU features individually. A savvy includes bias currents for analog circuits, low-power low-power designer should ensure that, at any point in timekeeping oscillators and leakage current. Static a program, only the currently needed features of the power is a major concern for battery-based systems, MCU are enabled and all others are turned off. which spend significant portions of the application lifetime in Sleep mode. A designer does have control over the external load capacitance of a signal that is routed to an I/O pin. Analog circuits, such as voltage regulators and These capacitances can be much larger than the inter- Brown-out Resets (BOR), require a certain amount of nal capacitance of the device and can cause significant bias current in order to maintain acceptable accuracy as losses. For this reason, it is important for a designer to temperature and voltage vary. In order to offset the cur- review a design for stray capacitance on digital switch- rent consumption of many of these modules, the best ing. Refer to the Hardware Design section for more techniques are to utilize flexibility built into the MCU to details on I/O low-power design techniques. enable and disable analog blocks, as necessary, or to utilize lower power and lower accuracy modes. Operating voltage is primarily defined by the process technology used in the manufacture of the MCU. As pro- cess geometries shrink, the operating voltage decreases and the device consumes lower dynamic power. An embedded system designer can utilize this knowledge by selecting MCUs which are capable of operating at lower voltages. However, if the minimum system voltage is defined by some other component of the system, such as a sensor or communications interface, this will require a cost versus power trade-off. This would require an additional voltage regulator for the MCU power, which DS01416A-page 2 2011 Microchip Technology Inc.