ATMEGA128RFA1-ZUR00

ATmega128RFA1 Features High Performance, Low Power AVR 8-Bit Microcontroller Advanced RISC Architecture - 135 Powerful Instructions Most Single Clock Cycle Execution - 32x8 General Purpose Worki ng Registers - Fully Static Operation - Up to 16 MIPS Throughput at 16 MHz and 1.8V - On-Chip 2-cycle Multiplier Non-volatile Program and Data Memories - 128K Bytes of In-System Self-Programmable Flash 8-bit Endurance: 10000 Write/Erase Cycles 125C (25000 Cycles 85C) - 4K Bytes EEPROM Microcontroller Endurance: 20000 Write/Erase Cycles 125C (100000 Cycles 25C) - 16K Bytes Internal SRAM with Low Power JTAG (IEEE std. 1149.1 compliant) Interface - Boundary-scan Capabilities According to the JTAG Standard 2.4GHz - Extensive On-chip Debug Support - Programming of Flash EEPROM, Fuses and Lock Bits through the JTAG interface Transceiver for Peripheral Features - Multiple Timer/Counter & PWM channels ZigBee and - Real Time Counter with Separate Oscillator - 10-bit, 330 ks/s A/D Converter Analog Comparator On-chip Temperature Sensor IEEE 802.15.4 - Master/Slave SPI Serial Inter face - Two Programmable Serial USART - Byte Oriented 2-wire Serial Interface Advanced Interrupt Handler Watchdog Timer with Separate On-Chip Oscillator ATmega128RFA1 Power-on Reset and Low Current Brown-Out Detector Advanced Power Save Modes Fully integrated Low Power Transceiver for 2.4 GHz ISM Band - Supported Data Rates: 250 kb/s and 500 kb/s, 1 Mb/s, 2 Mb/s - -100 dBm RX Sensitivity TX Output Power up to 3.5 dBm - Hardware Assisted MAC (Auto-Acknowledge, Auto-Retry) - 32 Bit IEEE 802.15.4 Symbol Counter - Baseband Signal Processing - SFD-Detection, Spreading De-Spreading Framing CRC-16 Computation PRELIMINARY - Antenna Diversity and TX/RX control - TX/RX 128 Byte Frame Buffer Hardware Security (AES, True Random Generator) Integrated Crystal Oscillators (32.768 kHz & 16 MHz, external crystal needed) I/O and Package - 38 Programmable I/O Lines - 64-pad QFN (RoHS/Fully Green) Temperature Range: -40C to 125C Industrial Supply voltage range 1.8V to 3.6V with integrated voltage regulators Ultra Low Power consumption (1.8 to 3.6V) for Rx/Tx & AVR: <18.6 mA - CPU Active Mode (16MHz): 4.1 mA - 2.4GHz Transceiver: RX ON 12.5 mA / TX 14.5 mA (maximum TX output power) - Deep Sleep Mode: <250nA 25C Speed Grade: 0 16 MHz 1.8 3.6V Applications ZigBee / IEEE 802.15.4-2006/2003 Full And Reduced Function Device (FFD/RFD) 8266F-MCU Wireless-09/14 General Purpose 2.4GHz ISM Band Transceiver with Microcontroller RF4CE, SP100, WirelessHART, ISM Applications and IPv6 / 6LoWPAN 1 8266F-MCU Wireless-09/14 1 Pin Configurations Figure 1-1. Pinout ATmega128RFA1 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 PF2:ADC2:DIG2 1 48 PE2:XCK0:AIN0 PF3:ADC3:DIG4 47 PE1:TXD0 2 PF4:ADC4:TCK Index corner PE0:RXD0:PCINT8 3 46 PF5:ADC5:TMS DVSS 4 45 PF6:ADC6:TDO 5 44 DEVDD PF7:ADC7:TDI 6 PB7:OC0A:OC1C:PCINT7 43 ATmega128RFA1 AVSS RFP PB6:OC1B:PCINT6 7 42 RFP PB5:OC1A:PCINT5 8 41 RFN 9 PB4:OC2A:PCINT4 40 AVSS RFN PB3:MISO:PDO:PCINT3 10 39 TST 11 38 PB2:MOSI:PDI:PCINT2 RSTN 12 37 PB1:SCK:PCINT1 RSTON 13 36 PB0:SSN:PCINT0 PG0:DIG3 14 35 DVSS Exposed paddle: AVSS PG1:DIG1 15 34 DEVDD PG2:AMR 16 33 CLKI 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 0 0 Note: The large center pad underneath the QFN/MLF package is made of metal and internally connected to AVSS. It should be soldered or glued to the board to ensure good mechanical stability. If the center pad is left unconnected, the package might loosen from the board. It is not recommended to use the exposed paddle as a replacement of the regular AVSS pins. 2 Disclaimer Typical values contained in this datasheet are based on simulation and characterization results of other AVR microcontrollers and radio transceivers manufactured in a similar process technology. Minimum and Maximum values will be available after the device is characterized. 2 ATmega128RFA1 8266F-MCU Wireless-09/14 PG3:TOSC2 PF1:ADC1 PG4:TOSC1 PF0:ADC0 AREF PG5:OC0B AVSS DVSS:DSVSS DVDD AVDD DVDD EVDD DEVDD AVSS:ASVSS DVSS XTAL1 PD0:SCL:INT0 XTAL2 DVSS PD1:SDA:INT1 DEVDD PD2:RXD1:INT2 PE7:ICP3:INT7:CLKO PD3:TXD1:INT3 PD4:ICP1 PE6:T3:INT6 PD5:XCK1 PE5:OC3C:INT5 PE4:OC3B:INT4 PD6:T1 PD7:T0 PE3:OC3A:AIN1