Product Information

AT86RF233-ZFR

AT86RF233-ZFR electronic component of Microchip

Datasheet
LOW POWER,2.4GHZ TRANSCEIVER ZIGBEE, RF4CE, IEEE 802.15.4,6LO WPAN, AND ISM APPLICATIONS

Manufacturer: Microchip
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Price (USD)

1: USD 4.1 ea
Line Total: USD 4.1

48 - Global Stock
Ships to you between
Wed. 15 May to Mon. 20 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
48 - WHS 1


Ships to you between
Wed. 15 May to Mon. 20 May

MOQ : 1
Multiples : 1

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AT86RF233-ZFR
Microchip

1 : USD 4.1
10 : USD 3.9168
30 : USD 3.8054
100 : USD 3.712

4810 - WHS 2


Ships to you between Tue. 14 May to Thu. 16 May

MOQ : 1
Multiples : 1

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AT86RF233-ZFR
Microchip

1 : USD 5.06
25 : USD 4.8645
5000 : USD 4.784

     
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AT86RF233 Low Power, 2.4GHz Transceiver for ZigBee, RF4CE, IEEE 802.15.4, 6LoWPAN, and ISM Applications PRELIMINARY DATASHEET Features High Performance RF-CMOS 2.4GHz radio transceiver targeted for IEEE 802.15.4, ZigBee , RF4CE, 6LoWPAN, and ISM applications Industry leading link budget: Receiver sensitivity -101dBm Programmable TX output power from -17dBm up to +4dBm Ultra-low current consumption: DEEP SLEEP = 0.02A TRX OFF = 300A RX ON = 11.8mA (LISTEN) Smart Receiving Techniques enable further current reduction in LISTEN mode between 10 to 50% from 11.8mA Desensitation will enable further reduction up to 1mA BUSY TX = 13.8mA (at max. transmit power) Ultra-low supply voltage (1.8V to 3.6V) with internal regulator Support for coin cell operation Optimized for low BoM Cost and ease of production: Few external components necessary (crystal, capacitors and antenna) Easy to use interface: Registers, frame buffer, and AES accessible through fast SPI Only two microcontroller GPIO lines necessary One interrupt pin from radio transceiver Clock output with prescaler from radio transceiver Radio transceiver features: 128-byte FIFO (SRAM) for data buffering Fully integrated, fast settling PLL to support Frequency Hopping Supports 500kHz channel spacing Battery monitor and Fast Wake-Up Time < 0.4msec Special IEEE 802.15.4 2011 hardware support: FCS computation and Clear Channel Assessment RSSI measurement, Energy Detection and Link Quality Indication MAC hardware accelerator: Automated acknowledgement, CSMA-CA and retransmission Automatic address filtering Automated FCS check Extended feature set hardware support: AES 128-bit hardware accelerator Antenna Diversity and RX/TX indication Supported PSDU data rates: 250kb/s, 500kb/s, 1000kb/s and 2000kb/s True Random Number Generation for security application Reduced Power Consumption modes Time and phase measurement support Industrial and extended temperature range: -40C to +85C and -40C to +125C I/O and packages: 32-pin Low-Profile QFN Package 5 x 5 x 0.9mm RoHS/Fully Green Compliant to EN 300 328/440, FCC-CFR-47 Part 15, ARIB STD-66, RSS-210 Compliant to IEEE 802.15.4 2003/2006/2011 Atmel-8351E-MCU Wireless-AT86RF233 Datasheet 072014 Table of Contents 1 Pin-out Diagram ............................................................................................................................ 7 1.1 Pin Descriptions ......................................................................................................................................................... 8 1.2 Analog and RF Pins ................................................................................................................................................... 9 1.2.1 Supply and Ground Pins ........................................................................................................................................................ 9 1.2.2 RF Pins .................................................................................................................................................................................. 9 1.2.3 Crystal Oscillator Pins .......................................................................................................................................................... 10 1.2.4 Analog Pin Summary ........................................................................................................................................................... 10 1.3 Digital Pins ............................................................................................................................................................... 11 1.3.1 Driver Strength Settings ....................................................................................................................................................... 11 1.3.2 Pull-up and Pull-down Configuration .................................................................................................................................... 11 2 Disclaimer .................................................................................................................................... 12 3 Overview ...................................................................................................................................... 12 4 General Circuit Description ........................................................................................................ 13 5 Application Schematic ................................................................................................................ 15 5.1 Basic Application Schematic .................................................................................................................................... 15 5.2 Extended Feature Set Application Schematic ......................................................................................................... 17 6 Microcontroller Interface ............................................................................................................ 19 6.1 Overview .................................................................................................................................................................. 19 6.2 SPI Timing Description ............................................................................................................................................ 20 6.3 SPI Protocol ............................................................................................................................................................. 21 6.3.1 Register Access Mode ......................................................................................................................................................... 21 6.3.2 Frame Buffer Access Mode ................................................................................................................................................. 22 6.3.3 SRAM Access Mode ............................................................................................................................................................ 24 6.4 Radio Transceiver Status information ..................................................................................................................... 25 6.4.1 Register Description ............................................................................................................................................................ 25 6.5 Radio Transceiver Identification .............................................................................................................................. 27 6.5.1 Register Description ............................................................................................................................................................ 27 6.6 Sleep/Wake-up and Transmit Signal (SLP TR) ...................................................................................................... 29 6.7 Interrupt Logic .......................................................................................................................................................... 31 6.7.1 Overview .............................................................................................................................................................................. 31 6.7.2 Interrupt Mask Modes and Pin Polarity ................................................................................................................................ 32 6.7.3 Register Description ............................................................................................................................................................ 33 7 Operating Modes ......................................................................................................................... 36 7.1 Basic Operating Mode ............................................................................................................................................. 36 7.1.1 State Control ........................................................................................................................................................................ 37 7.1.2 Basic Operating Mode Description ...................................................................................................................................... 37 7.1.3 Interrupt Handling ................................................................................................................................................................ 41 7.1.4 Basic Operating Mode Timing ............................................................................................................................................. 42 7.1.5 Register Description ............................................................................................................................................................ 48 7.2 Extended Operating Mode ....................................................................................................................................... 50 7.2.1 State Control ........................................................................................................................................................................ 52 7.2.2 Configuration ....................................................................................................................................................................... 53 7.2.3 RX AACK ON Receive with Automatic ACK ................................................................................................................... 54 7.2.4 TX ARET ON Transmit with Automatic Frame Retransmission and CSMA-CA Retry .................................................... 63 7.2.5 Interrupt Handling ................................................................................................................................................................ 67 2 MCU Wireless AT86RF233 PRELIMINARY DATASHEET Atmel-8351E-MCU Wireless-AT86RF233 Datasheet 072014

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8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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