Product Information

M02040G-14

M02040G-14 electronic component of MACOM

Datasheet
Post Amplifier 16-Pin QFN EP

Manufacturer: MACOM
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

10: USD 7.4176 ea
Line Total: USD 74.18

0 - Global Stock
MOQ: 10  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - WHS 1


Ships to you between Tue. 07 May to Mon. 13 May

MOQ : 10
Multiples : 1
10 : USD 7.4176

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
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M02040-14 3.3V Limiting Amplifier for Applications to 2.125 Gbps The M02040-14 is an integrated high-gain limiting amplifier. Featuring PECL outputs, the M02040-14 is useable in applications to 2.125 Gbps. Full output swing is achieved even at minimum input sensitivity. The M02040-14 oper- ates with a 3.3V supply. DC_Servo supports applications requiring instantaneous output response. The M02040-14 also includes two analog RSSI outputs proportional to either the average or peak to peak input sig- nal and a programmable signal-level detector allowing the user to set thresholds at which the logic outputs are enabled. Other available solutions: M02050-14 3.3V Limiting Amplifier for Applications to 2.5 Gbps (PECL outputs) M02049-14 3.3V Limiting Amplifier for Applications to 4.3 Gbps (CML outputs) M02043-14 3.3V Limiting Amplifier for Applications to 4.3 Gbps (CML outputs) 1.25 Gbps and 4.25 Gbps SFP reference designs available on Mindspeed.com Applications Features 1.0625 and 2.125 Gbps Fibre Channel  Operates with a 3.3V supply  1.25 Gbps Ethernet  2 mV typical input sensitivity at 1.25 Gbps  1.25 Gbps SDH/SONET  PECL outputs  Average Receive power monitor output (RSSI ) AVG  Peak-to-peak Receive power monitor output (RSSI ) PP  On-chip DC offset cancellation circuit  Offset cancellation circuit can be disabled for Burst mode applications  Low power (170 mW)  Output Jam function  16-pin 3x3 mm QFN package Typical Applications Diagram DC_Servo Control 12.1 k optional Jam I REF DC_Servo +3.3 V V TT Biasing AC-Coupled to TIA PECLP DINP Clock Data Limiting Output MT I02016 A Recovery Amplifier Buffer Unit Photodiode DINN PECLN MON Offset cancel Level RSSI PP Detect AC or DC Coupled Comparator RxAVG (as described in IN Level Threshold Applications Information) Shift Setting Circuit RSSI AVG LOS R EXT ST V SET CC R ST 02040-DSH-001-H Mindspeed Technologies December 2005 Mindspeed Proprietary and Confidential Ordering Information Part Number Package Operating Temperature M02040-14 * M02040-14 in QFN16 package 40 C to 85 C M02040-14EVM Evaluation board with M02040-14 40 C to 85 C * The letter G designator after the part number indicates that the device is RoHS-compliant. Refer to www.mindspeed.com for additional information. Revision History ASIC Revision Level Date Description Revision H Final December 2005 -14 Clarify comments on the use of the DC_Servo pin in the pin definitions and applications information. G Final August 2005 -14 Correct Jam connection in block diagram and typical applications figures. Correct I figure (reference current generation). REF F Final June 2005 -14 In the DC specifications, update R DIFF and RSSIavg; added note 1; moved IN RSSIavg from ac specifications. In the ac specifications update V , V , IN(MIN) LOS DJ and tr/tf; add specifications for LOS assert and deassert. Updated R ST values and the typical LOS curve (Figure 4-3 - Figure 4-5). Added typical hysteresis curve (Figure 4-6). E Preliminary March 2005 -14 Update the DC specification V . Update the ac specifications V , v , OH IN(MIN) n T , and T . Corrected the EVM ordering number. LOS_ON LOS_OFF D Preliminary December 2004 -14 Update the DC specifications R DIFF and V . Update R values, update IN IH ST RSSI information. Remove peaking circuit applications information as this is not necessary for the -14 revision. Note that the -14 is for 3.3V only. Typical Eye Diagram Pin Configuration 16 13 GND 1 12 RxAvg IN V GND CC Center Pad Connect to GND PECLN D N IN PECLP 4 9 D P IN 8 10 mV differential input 5 PP 1.25 Gbps 160 mV/div 140 ps/div 02040-DSH-001-H Mindspeed Technologies ii Mindspeed Proprietary and Confidential I REF RSSI PP ST SET RSSI AVG V CC LOS DC_Servo JAM

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits:
Aeroflex / Metelics (MACOM)
Aeroflex Metelics
M/A-COM
M/A-COM / TYCO
M/A-COM Technology Solutions
MA/COM
MACOM
Nitronex

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