HDMI-VIP-IB-EVN

HDMI VIP Output Bridge Board Evaluation Board User Guide FPGA-EB-02003 Version 1.1 June 2017 HDMI VIP Output Bridge Board Evaluation Board User Guide Contents Acronyms in This Document ................................................................................................................................................. 3 Introduction .................................................................................................................................................................. 4 1.1. Further Information .................................................................................................................................................. 4 Functional Description .................................................................................................................................................. 6 2.1. Reset ......................................................................................................................................................................... 6 2.2. HDMI Interface ......................................................................................................................................................... 6 High-Speed Headers and Jumper.................................................................................................................................. 7 Power Supply .............................................................................................................................................................. 10 Status Indicators and Test Points ................................................................................................................................ 11 Ordering information .................................................................................................................................................. 12 References .......................................................................................................................................................................... 13 Technical Support Assistance........................................................................................................................................... 13 Appendix A. HDMI VIP Output Bridge Board Schematics ................................................................................................... 14 Appendix B. HDMI VIP Output Bridge Board Bill of Materials ............................................................................................ 17 Revision History ................................................................................................................................................................... 21 Figures Figure 1.1. Top View of HDMI VIP Output Bridge Board ...................................................................................................... 4 Figure 1.2. Bottom View of HDMI VIP Output Bridge Board ................................................................................................ 5 Figure 2.1. Functional Block Diagram ................................................................................................................................... 6 Figure 4.1. Power Supply .................................................................................................................................................... 10 Figure A.1. Block Diagram ................................................................................................................................................... 14 Figure A.2. SiI1136 HDMI and GPIO Interface .................................................................................................................... 15 Figure A.3. Power Decoupling ............................................................................................................................................. 16 Tables 2 Table 2.1. SiI1136 7-bit I C Address ...................................................................................................................................... 6 Table 3.1. Connector J1 ........................................................................................................................................................ 7 Table 3.2. Connector J2 ........................................................................................................................................................ 8 Table 5.1. Status LED I/O Map ............................................................................................................................................ 11 Table 5.2. Test Points .......................................................................................................................................................... 11 Table 6.1. Reference Part Number ..................................................................................................................................... 12 2017 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. 2 FPGA-EB-02003-1.1