IS39LV040-70JCE

IS39LV040 / IS39LV010 / IS39LV512 4Mbit / 1Mbit / 512 Kbit 3.0 Volt-only CMOS Flash Memory FEATURES Automatic Erase and Byte Program Single Power Supply Operation - Build-in automatic program verification - Low voltage range: 2.70 V - 3.60 V - Typical 16 s/byte programming time - Typical 55 ms sector/block/chip erase time Memory Organization - IS39LV040: 512K x 8 (4 Mbit) Low Power Consumption - IS39LV010: 128K x 8 (1 Mbit) - Typical 4 mA active read current - IS39LV512: 64K x 8 (512 Kbit) - Typical 8 mA program/erase current - Typical 0.1 A CMOS standby current High Performance Read - 70 ns access time High Product Endurance Cost Effective Sector/Block Architecture - 100,000 program/erase cycles per single sector - Uniform 4 Kbyte sectors - Minimum 20 years data retention - Uniform 64 Kbyte blocks (sector group - except IS39LV512) Industrial Standard Pin-out and Packaging - 32-pin (8 mm x 14 mm) VSOP Data Polling and Toggle Bit Features - 32-pin PLCC Hardware Data Protection - Optional lead-free (Pb-free) package Operation temperature range o o - IS39LV040/010/512 0 C~+85 C GENERAL DESCRIPTION The IS39LV040/010/512 are 4 Mbit / 1 Mbit / 512 Kbit 3.0 Volt-only Flash Memories. These devices are designed to use a single low voltage, range from 2.70 Volt to 3.60 Volt, power supply to perform read, erase and program operations. The 12.0 Volt V power supply for program and erase operations are not required. The devices can PP be programmed in standard EPROM programmers as well. The memory array of IS39LV512 is divided into uniform 4 Kbyte sectors for data or code storage. The memory arrays of IS39LV010/040 are divided into uniform 4 Kbyte sectors or uniform 64 Kbyte blocks (sector group - consists of sixteen adjacent sectors). The sector or block erase feature allows users to flexibly erase a memory area as small as 4 Kbyte or as large as 64 Kbyte by one single erase operation without affecting the data in others. The chip erase feature allows the whole memory array to be erased in one single erase operation. The devices can be programmed on a byte-by-byte basis after performing the erase operation. The devices have a standard microprocessor interface as well as a JEDEC standard pin-out/command set. The program operation is executed by issuing the program command code into command register. The internal control logic automatically handles the programming voltage ramp-up and timing. The erase operation is executed by issuing the chip erase, block, or sector erase command code into command register. The internal control logic automatically handles the erase voltage ramp-up and timing. The preprogramming on the array which has not been programmed is not required before an erase operation. The devices offer Data Polling and Toggle Bit functions, the progress or completion of program and erase operations can be detected by reading the Data Polling on I/O7 or the Toggle Bit on I/O6. The IS39LV040/010/512 are manufactured on pFLASHs advanced nonvolatile CMOS technology. The devices are offered in 32-pin VSOP and PLCC packages with 70 ns access time. Integrated Silicon Solution, Inc. www.issi.com 1 Rev. B 07/29/2015IS39LV040 / IS39LV010 / IS39LV512 CONNECTION DIAGRAMS IS39LV512 IS39LV010 IS39LV040 IS39LV512 IS39LV040 IS39LV010 4 3 2 1 32 31 30 A7 A7 5 29 A14 A14 A14 A7 6 28 A13 A13 A13 A6 A6 A6 7 27 A8 A8 A5 A5 A5 A8 A9 A9 8 26 A9 A4 A4 A4 9 25 A11 A11 A11 A3 A3 A3 10 24 OE OE A2 A2 OE A2 11 23 A10 A10 A10 A1 A1 A1 12 22 A0 A0 A0 CE CE CE 13 21 I/O7 I/O7 I/O7 I/O0 I/O0 I/O0 15 16 17 18 19 20 14 32-Pin PLCC IS39LV040 IS39LV010 IS39LV512 IS39LV512 IS39LV010 IS39LV040 A11 A11 A11 1 OE OE OE 32 A9 A9 A9 2 31 A10 A10 A10 A8 A8 A8 30 CE CE CE 3 A13 A13 A13 29 I/O7 I/O7 I/O7 4 A14 A14 A14 28 I/O6 I/O6 I/O6 5 A17 NC NC 27 I/O5 I/O5 I/O5 6 WE WE WE 26 7 I/O4 I/O4 I/O4 VCC VCC VCC I/O3 I/O3 I/O3 8 25 A18 NC NC GND GND GND 9 24 A16 A16 NC I/O2 I/O2 I/O2 10 23 A15 A15 A15 22 I/O1 I/O1 I/O1 11 A12 A12 A12 21 I/O0 I/O0 I/O0 12 A7 A7 A7 13 20 A0 A0 A0 A6 A6 A6 14 19 A1 A1 A1 A5 A5 A5 A2 A2 A2 15 18 A4 A4 A4 17 A3 A3 A3 16 32-Pin VSOP Integrated Silicon Solution, Inc. www.issi.com 2 Rev. B 07/29/2015 IS39LV040 IS39LV010 IS39LV512 IS39LV512 IS39LV010 IS39LV040 I/O1 I/O1 I/O1 A12 A12 A12 I/O2 I/O2 I/O2 A15 A15 A15 GND GND GND A16 NC A16 I/O3 I/O3 I/O3 NC NC A18 I/O4 I/O4 I/O4 VCC VCC VCC I/O5 I/O5 I/O5 WE WE WE I/O6 I/O6 I/O6 NC NC A17