MM54C74/MM74C74 Dual D Flip-Flop February 1988 MM54C74/MM74C74 Dual D Flip-Flop General Description Y Low power 50 nW (typ.) The MM54C74/MM74C74 dual D flip-flop is a monolithic Y complementary MOS (CMOS) integrated circuit constructed Medium speed operation 10 MHz (typ.) with N- and P-channel enhancement transistors. Each flip- with 10V supply flop has independent data, preset, clear and clock inputs and Q and Q outputs. The logic level present at the data Applications Y input is transferred to the output during the positive going Automotive transition of the clock pulse. Preset or clear is independent Y Data terminals of the clock and accomplished by a low level at the preset Y Instrumentation or clear input. Y Medical electronics Y Alarm system Features Y Industrial electronics Y Supply voltage range 3V to 15V Y Remote metering Y 2 Tenth power TTL compatible Drive 2 LPT L loads Y Computers Y High noise immunity 0.45 V (typ.) CC Logic Diagram TL/F/58851 Truth Table Connection Diagram Dual-In-Line Package Preset Clear Q Q n n 00 0 0 01 1 0 10 0 1 11 *Q *Q n n *No change in output from previous state. Order Number MM54C74 or MM74C74 TL/F/58852 Top View Note: A logic 0 on clear sets Q to logic 0 . A logic 0 on preset sets Q to logic 1 . C 1995 National Semiconductor Corporation TL/F/5885 RRD-B30M105/Printed in U. S. A.Absolute Maximum Ratings (Note 1) b a If Military/Aerospace specified devices are required, Storage Temperature Range 65 Cto 150 C please contact the National Semiconductor Sales Power Dissipation Office/Distributors for availability and specifications. Dual-In-Line 700 mW Voltage at Any Pin (Note 1) b0.3V to V a0.3V Small Outline 500 mW CC Operating Temperature Range Lead Temperature (Soldering, 10 seconds) 260 C MM54C74 b55 Ctoa125 C Operating V Range 3V to 15V CC b a MM74C74 40 Cto 85 C V (Max) 18V CC DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise specified Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS e V Logical 1 Input Voltage V 5V 3.5 V IN(1) CC e V 10V 80 V CC e V Logical 0 Input Voltage V 5V 1.5 V IN(0) CC e V 10V 2.0 V CC e V Logical 1 Output Voltage V 5V 4.5 V OUT(1) CC e V 10V 9.0 V CC e V Logical 0 Output Voltage V 5V 0.5 V OUT(0) CC e V 10V 1.0 V CC I Logical 1 Input Current V e 15V 1.0 mA IN(1) CC e b I Logical 0 Input Current V 15V 1.0 mA IN(0) CC e I Supply Current V 15V 0.05 60 mA CC CC CMOS/LPTTL INTERFACE e V Logical 1 Input Voltage 54C, V 4.5V IN(1) CC V b1.5 CC e 74C, V 4.75V CC e V Logical 0 Input Voltage 54C, V 4.75V IN(0) CC 0.8 V e 74C, V 4.75V CC e eb V Logical 1 Output Voltage 54C, V 4.5V, I 360 mA OUT(1) CC D 2.4 V e eb 74C, V 4.75V, I 360 mA CC D e e V Logical 0 Output Voltage 54C, V 4.5V, I 360 mA OUT(0) CC D 0.4 V 74C, V e 4.75V, I e 360 mA CC D OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) I Output Source Current V e 5V, V e 0V SOURCE CC IN(0) b 1.75 mA e e T 25 C, V 0V A OUT e e I Output Source Current V 10V, V 0V SOURCE CC IN(0) b 8.0 mA e e T 25 C, V 0V A OUT e e I Output Sink Current V 5V, V 5V SINK CC IN(1) 1.75 mA e e T 25C, V V A OUT CC e e I Output Sink Current V 10V, V 10V SINK CC IN(1) 8.0 mA e e T 25C, V V A OUT CC Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. Except for Operating Temperature Range they are not meant to imply that the devices should be operated at these limits. The table of Electrical Characteristics provides conditions for actual device operation. 2