Product Information

BH62UV8001AIG55

BH62UV8001AIG55 electronic component of BSI

Datasheet
SRAM 8M(1MX8BIT)1.65-3.6V, BGA-48

Manufacturer: BSI
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 8.0896 ea
Line Total: USD 8.09

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - WHS 1


Ships to you between Thu. 23 May to Wed. 29 May

MOQ : 1
Multiples : 1
1 : USD 8.9004
10 : USD 7.8255
25 : USD 7.515
50 : USD 7.4529
100 : USD 6.8591
250 : USD 6.68

     
Manufacturer
Product Category
Memory Size
Access Time
Brand
Sram Memory Configuration
Supply Voltage Range
Memory Case Style
No. Of Pins
Operating Temperature Min
Operating Temperature Max
Rohs Phthalates Compliant
Svhc
Base Number
Memory Type
Operating Temperature Range
Supply Voltage Max
Supply Voltage Min
Termination Type
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Ultra Low Power/High Speed CMOS SRAM 1M X 8 bit BH62UV8001 Green package materials are compliant to RoHS n FEATURES n DESCRIPTION Wide V low operation voltage : 1.65V ~ 3.6V The BH62UV8001 is a high performance, ultra low power CMOS CC Ultra low power consumption : Static Random Access Memory organized as 1,048,576 by 8 bits V = 3.6V Operation current : 12mA (Max.) at 55ns and operates in a wide range of 1.65V to 3.6V supply voltage. CC 2mA (Max.) at 1MHz Advanced CMOS technology and circuit techniques provide both O Standby current : 2.5uA (Typ.) at 3.0V/25 C high speed and low power features with typical operating current of O O V = 1.2V Data retention current : 1.2uA (Typ.) at 25 C 1.5mA at 1MHz at 3.6V/25 C and maximum access time of 55ns at CC O High speed access time : 1.65V/85 C. -55 55ns (Max.) at V =1.65~3.6V Easy memory expansion is provided by an active LOW chip enable CC Automatic power down when chip is deselected (CE1), an active HIGH chip enable (CE2) and active LOW output Easy expansion with CE1, CE2 and OE options enable (OE) and three-state output drivers. Three state outputs and TTL compatible The BH62UV8001 has an automatic power down feature, reducing Fully static operation, no clock, no refresh the power consumption significantly when chip is deselected. Data retention supply voltage as low as 1.0V The BH62UV8001 is available in DICE form and 48-ball BGA package. n POWER CONSUMPTION POWER DISSIPATION STANDBY Operating PRODUCT OPERATING PKG TYPE (I , Max) (I , Max) CCSB1 CC FAMILY TEMPERATURE V =3.6V V =1.8V CC CC V =3.6V V =1.8V CC CC 1MHz 10MHz f 1MHz 10MHz f Max. Max. BH62UV8001DI DICE Industrial O O 15uA 12uA 2mA 6mA 12mA 1.5mA 5mA 8mA -40 C to +85 C BH62UV8001AI BGA-48-0608 n PIN CONFIGURATIONS n BLOCK DIAGRAM 1 2 3 4 5 6 A12 A NC OE A0 A1 A2 CE2 A11 A10 A9 Address 1024 Memory Array 10 A8 B NC NC A3 A4 CE1 NC Input Row A7 Decoder A6 Buffer 1024 x 8192 A5 C DQ0 NC A5 A6 NC DQ4 A4 A3 8192 D VSS DQ1 A17 A7 DQ5 VCC DQ0 8 Data 8 Column I/O Input DQ1 Buffer DQ2 Write Driver Sense Amp E VCC DQ2 NC A16 DQ6 VSS DQ3 8 DQ4 8 Data DQ5 Output 1024 Buffer DQ6 F DQ3 NC A14 A15 NC DQ7 Column Decoder DQ7 10 CE1 G NC NC A12 A13 WE NC CE2 Control Address Input Buffer WE OE V CC H A18 A8 A9 A10 A11 A19 GND A19 A18 A17 A15 A14 A13 A16 A2 A1 A0 48-ball BGA top view Brilliance Semiconductor, Inc. reserves the right to change products and specifications without notice. Detailed product characteristic test report is available upon request and being accepted. R0201-BH62UV8001 Revision 1.1 1 May 2006 BH62UV8001 n PIN DESCRIPTIONS Name Function These 20 address inputs select one of the 1,048,576 x 8 bit in the RAM A0-A19 Address Input CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active when CE1 Chip Enable 1 Input data read from or write to the device. If either chip enable is not active, the device is CE2 Chip Enable 2 Input deselected and is in standby power mode. The DQ pins will be in the high impedance state when the device is deselected. The write enable input is active LOW and controls read and write operations. With the WE Write Enable Input chip selected, when WE is HIGH and OE is LOW, output data will be present on the DQ pins when WE is LOW, the data present on the DQ pins will be written into the selected memory location. The output enable input is active LOW. If the output enable is active while the chip is OE Output Enable Input selected and the write enable is inactive, data will be present on the DQ pins and they will be enabled. The DQ pins will be in the high impendence state when OE is inactive. 8 bi-directional ports are used to read data from or write data into the RAM. DQ0-DQ7 Data Input/Output Ports Power Supply V CC Ground V SS n TRUTH TABLE MODE CE1 CE2 WE OE I/O OPERATION V CURRENT CC H X X X Chip De-selected High Z I , I CCSB CCSB1 (Power Down) X L X X Output Disabled L H H H High Z ICC Read L H H L D I OUT CC Write L H L X D I IN CC NOTES: H means V L means V X means dont care (Must be V or V state) IH IL IH IL (1) n ABSOLUTE MAXIMUM RATINGS n OPERATING RANGE AMBIENT SYMBOL PARAMETER RATING UNITS RANG V CC TEMPERATURE Terminal Voltage with (2) V -0.5 to 4.6V V O O TERM Industrial -40 C to + 85 C 1.65V ~ 3.6V Respect to GND Temperature Under O T -40 to +125 C BIAS Bias O (1) O T Storage Temperature -60 to +150 C STG n CAPACITANCE (T = 25 C, f = 1.0MHz) A P Power Dissipation 1.0 W T SYMBOL PAMAMETER CONDITIONS MAX. UNITS I DC Output Current 20 mA OUT Input C V = 0V 6 pF IN IN Capacitance 1. Stresses greater than those listed under ABSOLUTE Input/Output C V = 0V 8 pF IO I/O MAXIMUM RATINGS may cause permanent damage to the Capacitance device. This is a stress rating only and functional operation of the device at these or any other conditions above those 1. This parameter is guaranteed and not 100% tested. indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. 2.0V in case of AC pulse width less than 30 ns R0201-BH62UV8001 Revision 1.1 2 May 2006

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
BSI
BSI (BRILLIANCE SEMICONDUCTOR)

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