Product Information

MAX5715AAUD+T

MAX5715AAUD+T electronic component of Analog Devices

Datasheet
Digital to Analog Converters - DAC Ultra-Small, 4-Channel, 12-/10-/8-Bit Buffered Voltage-Output DACs with Internal Reference and SPI Interface

Manufacturer: Analog Devices
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

2500: USD 7.1804 ea
Line Total: USD 17951

0 - Global Stock
MOQ: 2500  Multiples: 2500
Pack Size: 2500
Availability Price Quantity
0 - WHS 1


Ships to you between Wed. 22 May to Tue. 28 May

MOQ : 2500
Multiples : 2500

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MAX5715AAUD+T
Analog Devices

2500 : USD 7.1804
5000 : USD 6.7958
10000 : USD 6.6983
15000 : USD 6.601
20000 : USD 6.5035
25000 : USD 6.4061
250000 : USD 6.3086

0 - WHS 2


Ships to you between Tue. 28 May to Thu. 30 May

MOQ : 1
Multiples : 1

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MAX5715AAUD+T
Analog Devices

1 : USD 12.1199
10 : USD 10.526
25 : USD 10.0367
50 : USD 8.7101
96 : USD 8.6774
288 : USD 8.4709
576 : USD 8.0794
1056 : USD 7.9488
2592 : USD 7.8293

     
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EVALUATION KIT AVAILABLE MAX5713/MAX5714/MAX5715 Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered Output DACs with Internal Reference and SPI Interface General Description Benefits and Features The MAX5713/MAX5714/MAX5715 4-channel, low-power, S Four High-Accuracy DAC Channels 8-/10-/12-bit, voltage-output digital-to-analog converters 12-Bit Accuracy Without Adjustment (DACs) include output buffers and an internal reference 1 LSB INL Buffered Voltage Output that is selectable to be 2.048V, 2.500V, or 4.096V. The Monotonic Over All Operating Conditions MAX5713/MAX5714/MAX5715 accept a wide supply Independent Mode Settings for Each DAC voltage range of 2.7V to 5.5V with extremely low power S Three Precision Selectable Internal References (3mW) consumption to accommodate most low-voltage 2.048V, 2.500V, or 4.096V applications. A precision external reference input allows S Internal Output Buffer rail-to-rail operation and presents a 100kI (typ) load to Rail-to-Rail Operation with External Reference an external reference. 4.5s Settling Time The MAX5713/MAX5714/MAX5715 have a 50MHz 3-wire Outputs Directly Drive 2kI Loads SPI/QSPI/MICROWIRE/DSP-compatible serial interface S Small 5mm x 4.4mm 14-Pin TSSOP or Ultra-Small that also includes a RDY output for daisy-chain applica- 1.6mm x 2.2mm 12-Bump WLP Package tions. The DAC output is buffered and has a low supply current of less than 250FA per channel and a low off- S Wide 2.7V to 5.5V Supply Range set error of Q0.5mV (typ). On power-up, the MAX5713/ S Separate 1.8V to 5.5V V Power-Supply Input DDIO MAX5714/MAX5715 reset the DAC outputs to zero, pro- S 50MHz 3-Wire SPI/QSPI/MICROWIRE/DSP viding additional safety for applications that drive valves Compatible Serial Interface with RDY Output or other transducers which need to be off on power-up. S Power-On-Reset to Zero-Scale DAC Output The internal reference is initially powered down to allow use of an external reference. The MAX5713/MAX5714/ S LDAC and CLR For Asynchronous Control MAX5715 allow simultaneous output updates using soft- S Three Software-Selectable Power-Down Output ware LOAD commands or the hardware load DAC logic Impedances input (LDAC). 1kI, 100kI, or High Impedance A clear logic input (CLR) allows the contents of the CODE and the DAC registers to be cleared asynchronously and Functional Diagram sets the DAC outputs to zero. The MAX5713/MAX5714/ MAX5715 are available in a 14-pin TSSOP and an ultra- VDDIO VDD REF small, 12-bump WLP package and are specified over the -40NC to +125NC temperature range. MAX5713 INTERNAL REFERENCE/ MAX5714 EXTERNAL BUFFER MAX5715 CSB Applications 1 OF 4 DAC CHANNELS SCLK CODE DAC 8-/10-/12-BIT Programmable Voltage and Current Sources REGISTER LATCH DAC DIN OUTA BUFFER SPI SERIAL Gain and Offset Adjustment INTERFACE (RDY) OUTB OUTC Automatic Tuning and Optical Control CLR CLEAR/ CLEAR/ CODE RESET LOAD RESET 100kI 1kI OUTD (LDAC) Power Amplifier Control and Biasing DAC CONTROL LOGIC POWER-DOWN Process Control and Servo Loops POR Portable Instrumentation GND Data Acquisition ( ) TSSOP PACKAGE ONLY Ordering Information appears at end of data sheet. QSPI is a trademark of Motorola, Inc. MICROWIRE is a registered trademark of National For related parts and recommended products to use with this part, Semiconductor Corporation. refer to: www.maximintegrated.com/MAX5713.related For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxims website at www.maximintegrated.com. 19-6394 Rev 3 6/13MAX5713/MAX5714/MAX5715 Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered Output DACs with Internal Reference and SPI Interface ABSOLUTE MAXIMUM RATINGS V V to GND ................................................ -0.3V to +6V Maximum Continuous Current into Any Pin ....................Q50mA DD, DDIO OUT , REF to GND ...................................-0.3V to the lower of Operating Temperature Range ........................ -40NC to +125NC (V + 0.3V) and +6V Storage Temperature Range ............................ -65NC to +150NC DD Lead Temperature (TSSOP only)(soldering, 10s) ...........+300NC CSB, SCLK, LDAC, CLR to GND ............................ -0.3V to +6V DIN, RDY to GND ........................................-0.3V to the lower of Soldering Temperature (reflow) .................................... +260NC (V + 0.3V) and +6V DDIO Continuous Power Dissipation (T = +70NC) A TSSOP (derate at 10mW/NC above 70NC) ...................797mW WLP (derate at 16.1mW/NC above 70NC) ..................1288mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) TSSOP WLP Junction-to-Ambient Thermal Resistance ( ) .......100NC/W Junction-to-Ambient Thermal Resistance ( ) JA JA Junction-to-Case Thermal Resistance ( ) ...............30NC/W (Note 2) ........................................................................62NC/W JC Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Note 2: Visit www.maximintegrated.com/app-notes/index.mvp/id/1891 for information about the thermal performance of WLP packaging. ELECTRICAL CHARACTERISTICS (V = 2.7V to 5.5V, V = 1.8V to 5.5V, V = 0V, C = 200pF, R = 2kI, T = -40NC to +125NC, unless otherwise noted. Typical DD DDIO GND L L A values are at T = +25NC.) (Note 3) A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC PERFORMANCE (Note 4) MAX5713 8 Resolution and Monotonicity N MAX5714 10 Bits MAX5715 12 MAX5713 -0.25 Q0.05 +0.25 Integral Nonlinearity (Note 5) INL MAX5714 -0.5 Q0.25 +0.5 LSB MAX5715 -1 Q0. 5 +1 MAX5713 -0.25 Q0.05 +0.25 Differential Nonlinearity (Note 5) DNL MAX5714 -0.5 Q0.1 +0.5 LSB MAX5715 -1 Q0.2 +1 Offset Error (Note 6) OE -5 Q0.5 +5 mV Offset Error Drift Q10 FV/NC Gain Error (Note 6) GE -1.0 Q0.1 +1.0 %FS ppm of Gain Temperature Coefficient With respect to V Q3.0 REF FS/NC Zero-Scale Error 0 10 mV Full-Scale Error With respect to V -0.5 +0.5 %FS REF Maxim Integrated 2

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Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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