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EVAL-ADAU7118Z

EVAL-ADAU7118Z electronic component of Analog Devices

Datasheet
Interface Development Tools ADAU7118 EVAL BOARD

Manufacturer: Analog Devices
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1: USD 693.42 ea
Line Total: USD 693.42

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EVAL-ADAU7118Z
Analog Devices

1 : USD 1162.079

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Ships to you between Thu. 30 May to Mon. 03 Jun

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EVAL-ADAU7118Z
Analog Devices

1 : USD 693.42

     
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8-Channel, 2 PDM to I S/TDM Converter Data Sheet ADAU7118 FEATURES FUNCTIONAL BLOCK DIAGRAM 1.10V TO 1.98V 1.70V TO 3.63V 8 channels of PDM audio inputs from digital microphones 16, 32, or 64 decimation ratio of PDM to PCM audio data 24-bit resolution to support high sound pressure level (SPL) microphones DVDD GND IOVDD 126 dB A-weighted SNR 4 kHz to 192 kHz output sampling rate PDM CLK0 Bit clock rates of 64, 128, 192, 256, 384, or 512 the output sampling rate PDM CLK1 Dual output PDM clocks BCLK 2 PDM DIGITAL I S/TDM Automatic PDM clock generation INPUT DECIMATION OUTPUT FSYNC PDM DAT0 PORT FILTERING Automatic power-down when BCLK removed PORT SDATA 2 Selectable I C control or hardware mode operation PDM DAT1 1.2 mA DVDD operating current for 8 channels at 48 kHz PDM DAT2 frequency sampling rate and 1.8 V supply 2 Slave I S or TDM output interface PDM DAT3 Up to TDM-16 supported Configurable TDM slot routing and sizes 2 SDA I C I/O supply voltage from 1.70 V to 3.63 V CONTROL ADAU7118 SCL DVDD supply voltage from 1.10 V to 1.98 V <5 A typical DVDD shutdown current 16-lead, 3 mm 3 mm, 0.50 mm pitch LFCSP ADDR/CONFIG EN Power-on reset Figure 1. APPLICATIONS Microphone arrays Mobile computing Portable electronics Consumer electronics Professional electronics GENERAL DESCRIPTION The ADAU7118 converts four stereo pulse density modulation Note that throughout this data sheet, multifunction pins, such (PDM) bitstreams into one pulse code modulation (PCM) output as ADDR/CONFIG, are referred to either by the entire pin stream. The source for the PDM data can be eight microphones name or by a single function of the pin, for example, ADDR, or other PDM sources. The PCM audio data is output on a serial when only that function is relevant. 2 audio interface port in either inter-IC serial (I S) or time domain multiplexed (TDM) format. The ADAU7118 is specified over the commercial temperature range (40C to +85C). The ADAU7118 is available in a 16-lead, 3 mm 3 mm, 0.40 mm pitch, lead frame chip scale package (LFCSP). Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 17230-001ADAU7118 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 ADI Vendor ID Register ............................................................ 21 Applications ....................................................................................... 1 Device ID 1 Register .................................................................. 21 Functional Block Diagram .............................................................. 1 Device ID 2 Register .................................................................. 21 General Description ......................................................................... 1 Revision Code Register .............................................................. 21 Revision History ............................................................................... 2 Channel Pair and Clock Enables Register ............................... 22 Specifications ..................................................................................... 3 Decimation Ratio and PDM Clock Mapping Controls Register ........................................................................................ 23 Absolute Maximum Ratings ............................................................ 7 High-Pass Filter Controls Register ........................................... 24 Thermal Resistance ...................................................................... 7 Serial Port Controls 1 Register ................................................. 25 ESD Caution .................................................................................. 7 Serial Port Controls 2 Register ................................................. 25 Pin Configuration and Function Descriptions ............................. 8 Serial Port Routing and Drive Enable Channel 0 Register ... 26 Typical Performance Characteristics ............................................. 9 Serial Port Routing and Drive Enable Channel 1 Register ... 27 Theory of Operation ...................................................................... 11 Serial Port Routing and Drive Enable Channel 2 Register ... 28 Power-Up and Initialization ...................................................... 11 Serial Port Routing and Drive Enable Channel 3 Register ... 29 Clocking ....................................................................................... 11 Serial Port Routing and Drive Enable Channel 4 Register ... 30 Power-Down State ...................................................................... 12 Serial Port Routing and Drive Enable Channel 5 Register ... 31 Standalone Hardware Mode...................................................... 12 Serial Port Routing and Drive Enable Channel 6 Register ... 32 Serial Audio Output Interface................................................... 13 2 Serial Port Routing and Drive Enable Channel 7 Register ... 33 I C Control Interface .................................................................. 17 Output Pad Drive Strength Controls Register ........................ 34 Output Pin Drive Strength ........................................................ 18 Software Reset Register ............................................................. 34 High-Pass Filter .......................................................................... 18 Outline Dimensions ....................................................................... 35 Applications Information .............................................................. 19 Ordering Guide .......................................................................... 35 Register Summary .......................................................................... 20 Register Details ............................................................................... 21 REVISION HISTORY 8/2019Rev. 0 to Rev. A Change to Features Section ............................................................. 1 Changes to Ordering Guide .......................................................... 34 5/2019Revision 0: Initial Version Rev. A Page 2 of 35

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