Single Supply, 24-Bit, Sigma-Delta ADC with 10 V and 0 mA to 20 mA Inputs, Open Wire Detection Data Sheet AD4111 FEATURES GENERAL DESCRIPTION 1 Tested for robustness per: IEC6100-4-2, IEC6100-4-3, The AD4111 is a low power, low noise, 24-bit, sigma-delta (-) IEC6100-4-4, IEC6100-4-5, IEC6100-4-6, CISPR 11 analog-to-digital converter (ADC) that integrates an analog 24-bit ADC with integrated analog front end front end (AFE) for fully differential or single-ended, high Fast and flexible output rate: 1.25 SPS to 31.25 kSPS impedance (1 M) bipolar, 10 V voltage inputs, and 0 mA Channel scan data rate of 6.21 kSPS per channel to 20 mA current inputs. (161 s settling) The AD4111 also integrates key analog and digital signal 16 noise free bits at 1 kSPS per channel conditioning blocks to configure eight individual setups for 85 dB rejection of 50 Hz and 60 Hz at 20 SPS per channel each analog input channel in use. The AD4111 features a 10 V inputs, 4 differential or 8 single-ended maximum channel scan rate of 6.21 kSPS (161 s) for fully Pin absolute maximum rating 50 V settled data. Absolute input pin voltage up to 20 V The embedded 2.5 V, low drift (5 ppm/C), band gap internal 1 M impedance reference (with output reference buffer) reduces the external 0.06% accuracy at 25C component count. Open wire detection 0 mA to 20 mA inputs, 4 single-ended The digital filter allows flexible settings, including simultaneous Pin absolute maximum rating 50 mA 50 Hz and 60 Hz rejection at a 27.27 SPS output data rate. The Input range from 0.5 mA to +24 mA user can select between the different filter settings depending on 60 impedance the demands of each channel in the application. The automatic 0.08% accuracy at 25C channel sequencer enables the ADC to switch through each On-chip 2.5 V reference enabled channel. 0.12% accuracy at 25C, 5 ppm/C (typical) drift The precision performance of the AD4111 is achieved by Internal or external clock integrating the proprietary iPassives technology from Analog Power supplies Devices, Inc. The AD4111 is factory calibrated to achieve a high AVDD = 3.0 V to 5.5 V degree of specified accuracy. IOVDD = 2 V to 5.5 V The AD4111 also has the unique feature of open wire detection on Total IDD = 3.9 mA the voltage inputs for system level diagnostics using a single 5 V or Temperature range: 40C to +105C 3.3 V power supply. 3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK) SPI, QSPI, MICROWIRE, and DSP compatible The AD4111 operates with a single power supply, making it easy to use in galvanically isolated applications. The specified APPLICATIONS operating temperature range is 40C to +105C. The AD4111 Process control is housed in a 40-lead, 6 mm 6 mm LFCSP package. PLC and DCS modules Instrumentation and measurement 1 Protected by U.S. Patent 10,852,360. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20182021 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. AD4111 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 CRC Calculation ......................................................................... 40 Applications ...................................................................................... 1 Integrated Functions ...................................................................... 42 General Description ......................................................................... 1 General-Purpose Outputs ......................................................... 42 Revision History ............................................................................... 3 Delay ............................................................................................ 42 Functional Block Diagram .............................................................. 4 16-Bit/24-Bit Conversions ........................................................ 42 Specifications .................................................................................... 5 DOUT RESET ........................................................................... 42 Timing Characteristics ................................................................ 8 Synchronization ......................................................................... 42 Absolute Maximum Ratings ......................................................... 10 Error Flags ................................................................................... 43 Thermal Resistance .................................................................... 10 DATA STAT .............................................................................. 43 ESD Caution................................................................................ 10 IOSTRENGTH ........................................................................... 43 Pin Configuration and Function Descriptions .......................... 11 Internal Temperature Sensor ................................................... 43 Typical Performance Characteristics ........................................... 13 Applications Information ............................................................. 44 Noise Performance and Resolution ............................................. 18 IEC61000-4-x and CISPR 11 Robustness ............................... 44 Theory of Operation ...................................................................... 20 Grounding and Layout .............................................................. 44 Power Supplies ............................................................................ 21 Register Summary .......................................................................... 45 Digital Communication ............................................................ 21 Register Details ............................................................................... 47 AD4111 Reset .............................................................................. 22 Communications Register ........................................................ 47 Configuration Overview ............................................................ 23 Status Register ............................................................................. 48 Circuit Description ......................................................................... 26 ADC Mode Register ................................................................... 49 Multiplexer .................................................................................. 26 Interface Mode Register ............................................................ 50 Current Inputs ............................................................................ 27 Register Check ............................................................................ 51 Voltage Inputs ............................................................................. 27 Data Register ............................................................................... 51 Data Output Coding .................................................................. 29 GPIO Configuration Register ................................................... 52 AD4111 Reference ...................................................................... 29 ID Register .................................................................................. 53 Buffered Reference Input .......................................................... 30 Channel Register 0 ..................................................................... 53 Clock Source ............................................................................... 30 Channel Register 1 to Channel Register 15 ............................ 54 Digital Filter .................................................................................... 31 Setup Configuration Register 0 ................................................ 55 Sinc5 + Sinc1 Filter .................................................................... 31 Setup Configuration Register 1 to Setup Configuration Register 7 ..................................................................................... 55 Sinc3 Filter ................................................................................... 31 Filter Configuration Register 0 ................................................ 56 Single Cycle Settling ................................................................... 32 Filter Configuration Register 1 to Filter Configuration Enhanced 50 Hz and 60 Hz Rejection Filters ......................... 32 Register 7 ..................................................................................... 57 Operating Modes ............................................................................ 35 Offset Register 0 ......................................................................... 57 Continuous Conversion Mode ................................................. 35 Offset Register 1 to Offset Register 7 ....................................... 57 Continuous Read Mode ............................................................ 36 Gain Register 0 ........................................................................... 58 Single Conversion Mode ........................................................... 37 Gain Register 1 to Gain Register 7 ........................................... 58 Standby and Power-Down Modes ........................................... 38 Outline Dimensions ....................................................................... 59 Calibration ................................................................................... 38 Ordering Guide .......................................................................... 59 Digital Interface .............................................................................. 39 Checksum Protection ................................................................ 39 Rev. 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