ADSP-CM403CSWZ-EF

Mixed-Signal Control Processor with ARM Cortex-M4 and 16-Bit ADCs ADSP-CM402F/CM403F/CM407F/CM408F/CM409F Full Speed USB on-the-go (OTG) SYSTEM FEATURES Two CAN (controller area network) 2.0B interfaces Up to 240 MHz ARM Cortex-M4 with floating-point unit Three UART ports 24-channel analog front end (AFE) with 16-bit ADCs Two serial peripheral interface (SPI-compatible) ports 128K Byte to 384K Byte zero-wait-state L1 SRAM with Three/four synchronous serial ports 16K Byte L1 cache Eight 32-bit GP timers, three capture timing units Up to 2M Byte flash memory Four encoder interfaces, 2 with frequency division Single 3.3 V power supply 2 One TWI unit, fully compatible with I C bus standard Package Options: Lightweight security 176-lead (24 mm 24 mm) LQFP package 120-lead (14 mm 14 mm) LQFP package ANALOG FRONT END 212-ball (19 mm 19 mm) BGA package Two 16-bit SAR ADCs with up to 24 multiplexed inputs, Static memory controller (SMC) with asynchronous memory supporting dual simultaneous conversion in 380 ns (16-bit, interface that supports 8-bit and 16-bit memories no missing codes) Enhanced PWM units ADC controller (ADCC) and DAC controller (DACC) rd th Four 3 /4 order SINC filter pairs for glueless connection of Two 12-bit DACs sigma-delta modulators Two 2.5 V precision voltage reference outputs Hardware-based harmonic analysis engine (For details, see ADC/DAC Specifications on Page 68) 10/100 Ethernet MAC with IEEE 1588v2 support SYSTEM CONTROL BLOCKS PERIPHERALS JTAG, SWD, PLL & POWER FAULT EVENT SYSTEM SECURITY 2 CoreSight TRACE MANAGEMENT MANAGEMENT CONTROL WATCHDOGS 1 TWI / I C 4 QUADRATURE ENCODER 12 PWM PAIRS Cortex-M4 L1 CACHE L1 MEMORY 8 TIMER 3 CPTMR UP TO 384K BYTE 16K BYTE 2 CAN PARITY-ENABLED L1 INSTRUCTION ZERO-WAIT-STATE SRAM CACHE 3 UART 2 SPI 2x SPORT 1 EMAC WITH SYSTEM FABRIC IEEE 1588 (OPTIONAL) STATIC MEMORY ANALOG FRONT END HARMONIC ANALYSIS ENGINE L3 MEMORY CONTROLLER (HAE) ASYNC INTERFACE ADCC DACC UP TO 2M BYTE FLASH SINC FILTERS (EXECUTABLE) 2 DAC 2 ADC HARDWARE FUNCTIONS USB FS OTG (OPTIONAL) Figure 1. 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Technical Support www.analog.com GPIO (40 OR 91)ADSP-CM402F/CM403F/CM407F/CM408F/CM409F TABLE OF CONTENTS General Description ................................................. 3 ADSP-CM409F 212-Ball BGA Signal Descriptions ......... 40 Analog Front End ................................................. 4 ADSP-CM409F GPIO Multiplexing for 212-Ball BGA ..... 48 ARM Cortex-M4 Core ........................................... 7 ADSP-CM40xF Designer Quick Reference ................... 51 EmbeddedICE ...................................................... 7 Specifications ........................................................ 64 Processor Infrastructure ......................................... 8 Operating Conditions ........................................... 64 Memory Architecture ............................................ 8 Electrical Characteristics ....................................... 66 System Acceleration ............................................ 10 ADC/DAC Specifications ...................................... 68 Security Features ................................................ 10 Flash Specifications .............................................. 74 Processor Reliability Features ................................. 11 Absolute Maximum Ratings ................................... 75 Additional Processor Peripherals ............................ 11 ESD Sensitivity ................................................... 75 Clock and Power Management ............................... 14 Package Information ............................................ 75 System Debug Unit (SDU) .................................... 16 Timing Specifications ........................................... 76 Development Tools ............................................. 17 Processor Test Conditions ................................... 107 Additional Information ........................................ 17 Output Drive Currents ....................................... 107 Related Signal Chains .......................................... 17 Environmental Conditions .................................. 108 Security Features Disclaimer .................................. 17 ADSP-CM402F/ADSP-CM403F 120-Lead LQFP Lead Assignments ............................................. 110 ADSP-CM40xF Detailed Signal Descriptions ................ 18 ADSP-CM407F/ADSP-CM408F 176-Lead LQFP ADSP-CM402F/ADSP-CM403F 120-Lead LQFP Lead Assignments ............................................. 113 Signal Descriptions ............................................. 22 ADSP-CM409F 212-Ball BGA Ball Assignments .......... 117 ADSP-CM402F/ADSP-CM403F GPIO Multiplexing for 120-Lead LQFP .............................................. 27 Outline Dimensions .............................................. 121 ADSP-CM407F/ADSP-CM408F 176-Lead LQFP Ordering Guide ................................................ 124 Signal Descriptions ............................................. 29 ADSP-CM407F/ADSP-CM408F GPIO Multiplexing for 176-Lead LQFP .............................................. 37 REVISION HISTORY 11/15Rev. 0 to Rev. A Change to equation in Serial Ports ............................. 83 Change to equation in Serial Peripheral Interface (SPI) Port Master Timing ...................................................... 89 Changes to Ordering Guide ..................................... 124 Rev. A Page 2 of 124 November 2015