ADG428BRZ

2 LC MOS Latchable 4-/8-Channel a High Performance Analog Multiplexers ADG428/ADG429 FEATURES FUNCTIONAL BLOCK DIAGRAMS 44 V Supply Maximum Ratings V to V Analog Signal Range SS DD Low On Resistance (60 V typ) ADG428 ADG429 Low Power Consumption (1.6 mW max) S1 S1A Low Charge Injection (<4 pC typ) DA Fast Switching S4A Break-Before-Make Switching Action D Plug-In Replacement for DG428/DG429 S1B DB APPLICATIONS S8 S4B Automatic Test Equipment Data Acquisition Systems DECODERS/DRIVERS DECODERS/DRIVERS Communication Systems LATCHES LATCHES Avionics and Military Systems Microprocessor Controlled Analog Systems WR WR RS RS Medical Instrumentation A2 A1 A0 EN A1 A0 EN GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG428 and ADG429 are monolithic CMOS analog 1. Extended Signal Range multiplexers comprising eight single channels and four differen- The ADG428/ADG429 are fabricated on an enhanced 2 MOS process, giving an increased signal range that ex- tial channels respectively. On-chip address and control latches LC facilitate microprocessor interfacing. The ADG428 switches one tends to the supply rails. of eight inputs to a common output as determined by the 3-bit 2. Low Power Dissipation binary address lines A0, A1 and A2. The ADG429 switches one 3. Low R ON of four differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. An EN 4. Single/Dual Supply Operation input on both devices is used to enable or disable the device. 5. Single Supply Operation When disabled, all channels are switched OFF. All the control For applications where the analog signal is unipolar, the inputs, address and enable inputs are TTL compatible over the ADG428/ADG429 can be operated from a single rail power full specified operating temperature range. This makes the part supply. The parts are fully specified with a single +12 V suitable for bus-controlled systems such as data acquisition sys- power supply and will remain functional with single supplies tems, process controls, avionics and ATEs because the TTL- as low as +5 V. compatible address latches simplify the digital interface design and reduce the board space required. 2 MOS The ADG428/ADG429 are designed on an enhanced LC process that provides low power dissipation yet gives high switching speed and low on resistance. Each channel conducts equally well in both directions when ON and has an input signal range that extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. All channels exhibit break-before-make switching action, preventing momentary shorting when switching channels. Inherent in the design is low charge injection for mini- mum transients when switching the digital inputs. The ADG428/ADG429 are improved replacements for the DG428/DG429 Analog Multiplexers. REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or Tel: 781/329-4700 World Wide Web Site: ADG428/ADG429SPECIFICATIONS 1 (V = +15 V, V = 15 V, GND = 0 V, WR = 0 V, RS = 2.4 V unless otherwise noted) DUAL SUPPLY DD SS B Version T Version 408C to 558C to Parameter +258C +858C +258C +1258C Units Test Conditions/Comments ANALOG SWITCH to V V to V V Analog Signal Range V SS DD SS DD R 60 60 W typ V = 10 V, I = 1 mA ON D S 100 125 100 125 W max D R 10 10 % max 10 V < V < 10 V, I = 1 mA ON S S LEAKAGE CURRENTS Source OFF Leakage I (OFF) 0.03 0.3 0.03 0.3 nA typ V = 10 V, V = 710 V S D S 0.5 50 0.5 50 nA max Test Circuit 2 (OFF) V = 10 V, V = 710 V Drain OFF Leakage I D D S ADG428 0.07 0.7 0.07 0.7 nA typ Test Circuit 3 1 100 1 100 nA max ADG429 0.05 0.5 0.05 0.5 nA typ 1 50 1 50 nA max Channel ON Leakage I , I (ON) V = V = 10 V D S S D ADG428 1 100 1 100 nA max Test Circuit 4 ADG429 1 50 1 50 nA max DIGITAL INPUTS Input High Voltage, V 2.4 2.4 V min INH Input Low Voltage, V 0.8 0.8 V max INL Input Current I or I 0.1 1 0.1 1 m A max V = 0 or V INL INH IN DD C , Digital Input Capacitance 8 8 pF typ f = 1 MHz IN 2 DYNAMIC CHARACTERISTICS t 110 110 ns typ R = 1 MW , C = 35 pF TRANSITION L L = 10 V, V = 710 V 250 300 250 300 ns max V S1 S8 Test Circuit 5 10 10 ns min R = 1 kW , C = 35 pF t OPEN L L V = +5 V Test Circuit 6 S (EN, WR) 115 115 ns typ R = 1 kW , C = 35 pF t ON L L 150 225 150 225 ns max V = +5 V Test Circuit 7 S (EN, RS) 105 105 ns typ R = 1 kW , C = 35 pF t OFF L L 150 300 150 300 ns max V = +5 V Test Circuit 7 S , Write Pulsewidth 100 100 ns min t W t , Address, Enable Setup Time 100 100 ns min S , Address, Enable Hold Time 10 10 ns min t H t , Reset Pulsewidth 100 100 ns min V = +5 V RS S = 0 V, R = 0 W , C = 10 nF Charge Injection 4 4 pC typ V S S L Test Circuit 10 = 1 kW , C = 15 pF, f = 100 kHz OFF Isolation 75 75 dB typ R L L 60 60 dB min V = 7 V rms, V = 0 V Test Circuit 11 S EN = 1 kW , C = 15 pF, f = 100 kHz Channel-to-Channel Crosstalk 85 85 dB typ R L L Test Circuit 12 (OFF) 11 11 pF typ f = 1 MHz C S C (OFF) f = 1 MHz D ADG428 40 40 pF typ ADG429 20 20 pF typ , C (ON) f = 1 MHz C D S ADG428 54 54 pF typ ADG429 34 34 pF typ POWER REQUIREMENTS V = 0 V, V = 0 V IN EN I 20 20 m A typ DD 100 100 m A max I 0.001 0.001 m A typ SS 55 m A max NOTES 1 Temperature ranges are as follows: B Version: 40 C to +85 C T Version: 55 C to +125 C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice. 2 REV. C