30 V, 8 MHz, Low Bias Current, Single-Supply, RRO, Precision Op Amps Data Sheet ADA4622-1/ADA4622-2/ADA4622-4 FEATURES PIN CONFIGURATION Next generation of the AD820/AD822/AD824 OUT A 1 8 V+ Wide gain bandwidth product: 8 MHz typical 2 7 IN A ADA4622-2 OUT B TOP VIEW High slew rate 3 6 +IN A IN B (Not to Scale) 23 V/s typical (low to high) V 4 5 +IN B 18 V/s typical (high to low) Low input bias current: 10 pA maximum at T = 25C A Figure 1. 8-Lead Mini Small Outline Package MSOP Pin Configuration (See the Pin Configurations and Function Descriptions Section Low offset voltage for Additional Pin Configurations) A grade: 0.8 mV maximum at T = 25C A B grade: 0.35 mV maximum at T = 25C A Low offset voltage drift A grade: 2 V/C typical, 15 V/C maximum B grade: 2 V/C typical, 5 V/C maximum Input voltage range includes Pin V Rail-to-rail output Electromagnetic interference rejection ratio (EMIRR) 90 dB typical at f = 1000 MHz and f = 2400 MHz Industry-standard package and pinouts APPLICATIONS High output impedance sensor interfaces Photodiode sensor interfaces Transimpedance amplifiers ADC drivers Precision filters and signal conditioning GENERAL DESCRIPTION The ADA4622-1/ADA4622-2/ADA4622-4 are the next generation Voltage noise is reduced although the supply current remains of the AD820/AD822/AD824 single-supply, rail-to-rail output the same as the AD820/AD822/AD824, broadband noise is (RRO), precision junction field effect transistors (JFET) input reduced by 25%, and 1/f is reduced by half. DC precision in the op amps. The ADA4622-1/ADA4622-2/ADA4622-4 include ADA4622-1/ADA4622-2/ADA4622-4 improved from the many improvements that make them desirable as upgrades AD820/AD822/AD824 with half the offset and a maximum without compromising the flexibility and ease of use that makes thermal drift specification added to the ADA4622-1/ADA4622-2/ the AD820/AD822/AD824 useful for a wide variety of applications. ADA4622-4. The common-mode rejection ratio (CMRR) is improved from the AD820/AD822/AD824 to make the The input voltage range includes the negative supply and the ADA4622-1/ADA4622-2/ADA4622-4 more suitable when used in output swings rail-to-rail. Input EMI filters increase the signal noninverting gain and difference amplifier configurations. robustness in the face of closely located switching noise sources. The ADA4622-1/ADA4622-2/ADA4622-4 are specified for The speed, in terms of bandwidth and slew rate, increases along operation over the extended industrial temperature range of 40C with a strong output drive to improve settling time performance to +125C, and operate from 5 V to 30 V, with specifications at and enables the devices to drive the inputs of modern single- +5 V, 5 V, and 15 V. The ADA4622-1 is available in a 5-lead ended, successive approximation register (SAR) analog-to- SOT-23 package and an 8-lead LFCSP package. The ADA4622-2 digital converters (ADCs). is available in an 8-lead SOIC N package, an 8-lead MSOP package, and an 8-lead LFCSP package. The ADA4622-4 is available in a 14-lead SOIC N and a 16-lead, 4 4 mm LFCSP. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20152019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 13502-001ADA4622-1/ADA4622-2/ADA4622-4 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory Of Operation ..................................................................... 27 Applications ....................................................................................... 1 Input Characteristics .................................................................. 27 Pin Configuration ............................................................................. 1 Output Characteristics............................................................... 28 General Description ......................................................................... 1 Shutdown Operation.................................................................. 29 Revision History ............................................................................... 2 Applications Information .............................................................. 30 Specifications ..................................................................................... 4 Recommended Power Solution ................................................ 30 Electrical Characteristics, V = 15 V ...................................... 4 Maximum Power Dissipation ................................................... 30 SY Electrical Characteristics, VSY = 5 V ........................................ 6 Second-Order Low-Pass Filter.................................................. 30 Electrical Characteristics, VSY = 5 V .......................................... 8 Wideband Photodiode Preamplifier ........................................ 30 Absolute Maximum Ratings .......................................................... 10 Peak Detector .............................................................................. 33 Thermal Resistance .................................................................... 10 Multiplexing Inputs .................................................................... 33 ESD Caution ................................................................................ 10 Full Wave Rectifier ..................................................................... 34 Pin Configurations and Function Descriptions ......................... 11 Outline Dimensions ....................................................................... 35 Typical Performance Characteristics ........................................... 15 Ordering Guide .......................................................................... 37 REVISION HISTORY 1/2019Rev. D to Rev. E Changes to Figure 99 and Peak Detector Section ...................... 32 Changed 8-Lead SOIC to 8-Lead SOIC N ................ Throughout Updated Outline Dimensions ....................................................... 34 Changed 12-Lead SOIC to 14-Lead SOIC N ............ Throughout Changes to Ordering Guide .......................................................... 37 Changed pA/Hz to fA/Hz in Table 2 ......................................... 7 2/2017Rev. A to Rev. B Changed pA/Hz to fA/Hz in Table 3 ......................................... 9 Changes to Table 5 .......................................................................... 10 Added ADA4622-1 ........................................................ Throughout Changed AD822 to AD820/AD822 ............................ Throughout 4/2018Rev. C to Rev. D Changed ADA4622-2 to ADA4622-1/ADA4622-2 .. Throughout Changes to Figure 69 Caption to Figure 71 Caption ...................... 24 Changed 7.5 MHz to 8 MHz in Product Title ............................... 1 Updated Outline Dimensions, CP-16-20 .................................... 36 Added Figure 1 Renumbered Sequentially ................................... 1 Changes to Ordering Guide .......................................................... 36 Changes to Table 1 ............................................................................. 3 Changes to Table 2 ............................................................................. 5 Changes to Table 3 ............................................................................. 7 7/2017Rev. B to Rev. C Added ADA4622-4 ........................................................ Throughout Changes to Table 5 ............................................................................. 9 Changes to Features Section, General Description Section, and Added Figure 3, Table 6, Figure 4, and Table 7 Renumbered Figure 2 Caption ................................................................................. 1 Sequentially ..................................................................................... 10 Deleted Figure 1 Renumbered Sequentially ................................. 1 Changes to Figure 11 and Figure 12 ............................................ 12 Changes to Table 1 ............................................................................ 3 Added Figure 13 ............................................................................. 12 Changes to Table 2 ............................................................................ 5 Added Figure 78 ............................................................................. 23 Changes to Table 3 ............................................................................ 7 Added Shutdown Operation and Figure 86 to Figure 89 .......... 26 Changes to Table 5 ............................................................................ 9 Added Multiplexing Inputs Section, Figure 99, and Figure 100 ..... 30 Added Figure 7 and Table 10 Renumbered Sequentially ......... 12 Added Full Wave Rectifier Section, Figure 101, and Figure 102 .... 31 Added Figure 8 and Table 11......................................................... 13 Updated Outline Dimensions ....................................................... 32 Changes to Figure 12 Caption ....................................................... 14 Change to Ordering Guide ............................................................ 34 Changes to Figure 25 and Figure 26 ............................................. 16 Changes to Figure 28, Figure 29, Figure 30 Caption, Figure 31 2/2016Rev. 0 to Rev. A Caption, and Figure 32 Caption ................................................... 17 Added 8-Lead LFCSP ......................................................... Universal Changes to Figure 33 Caption ....................................................... 18 Changes to General Description Section ....................................... 1 Changes to Figure 53 and Figure 54 ............................................. 21 Changes to Settling Time to 0.1% Parameter and Settling Time Changes to Figure 80 ...................................................................... 26 to 0.01% Parameter, Table 1 ............................................................. 4 Changes to Figure 84 and Figure 85 ............................................. 27 Changes to Table 5 ............................................................................. 9 Changes to Figure 92 and Figure 94 ............................................. 29 Changes to Figure 97 ...................................................................... 31 Rev. E Page 2 of 38