Product Information

AD5628ACPZ-2-RL7

AD5628ACPZ-2-RL7 electronic component of Analog Devices

Datasheet
Digital to Analog Converters - DAC 12B SPI V-Out W 5 PPMoC On-Chip Ref

Manufacturer: Analog Devices
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1: USD 24.245 ea
Line Total: USD 24.24

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AD5628ACPZ-2-RL7
Analog Devices

1 : USD 24.245
10 : USD 22.672
25 : USD 21.1375
100 : USD 18.9375
250 : USD 18.2
500 : USD 17.3125
1000 : USD 16.8875

     
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Octal, 12-/14-/16-Bit, SPI Voltage Output denseDAC with 5 ppm/C, On-Chip Reference Data Sheet AD5628/AD5648/AD5668 FEATURES FUNCTIONAL BLOCK DIAGRAM V /V V REFIN REFOUT DD Low power, small footprint, pin-compatible octal DACs AD5628/AD5648/AD5668 1.25V/2.5V AD5668: 16 bits REF BUFFER AD5648: 14 bits INPUT DAC STRING V A LDAC OUT REGISTER REGISTER DAC A AD5628: 12 bits BUFFER INPUT DAC STRING V B OUT REGISTER REGISTER DAC B 14-lead/16-lead TSSOP, 16-lead LFCSP, and 16-ball WLCSP BUFFER DAC STRING INPUT SCLK V C On-chip 1.25 V/2.5 V, 5 ppm/C reference OUT REGISTER REGISTER DAC C BUFFER Power down to 400 nA at 5 V, 200 nA at 3 V INTERFACE INPUT DAC STRING SYNC LOGIC V D OUT REGISTER REGISTER DAC D 2.7 V to 5.5 V power supply BUFFER INPUT DAC STRING DIN V E OUT REGISTER REGISTER DAC E Guaranteed monotonic by design BUFFER INPUT DAC STRING Power-on reset to zero scale or midscale V F REGISTER REGISTER DAC F OUT 3 power-down functions BUFFER DAC INPUT STRING V G OUT REGISTER REGISTER DAC G Hardware LDAC and LDAC override function BUFFER INPUT DAC STRING V H OUT REGISTER REGISTER DAC H CLR function to programmable code POWER-DOWN POWER-ON Rail-to-rail operation LOGIC RESET 1 GND LDAC 1 CLR APPLICATIONS 1 RU-16 AND WLCSP PACKAGE ONLY. Figure 1. Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators GENERAL DESCRIPTION selectable output loads while in power-down mode for any or all The AD5628/AD5648/AD5668 devices are low power, octal, DAC channels. The outputs of all DACs can be updated simul- 12-/14-/16-bit, buffered voltage-output DACs. All devices taneously using the LDAC function, with the added functionality operate from a single 2.7 V to 5.5 V supply and are guaranteed of user-selectable DAC channels to simultaneously update. There monotonic by design. The AD5668 and AD5628 are available in is also an asynchronous CLR that updates all DACs to a user- both a 4 mm 4 mm LFCSP and a 16-lead TSSOP, while the programmable codezero scale, midscale, or full scale. AD5648 is available in both a 14-lead and 16-lead TSSOP. The AD5628/AD5648/AD5668 utilize a versatile 3-wire serial The AD5628/AD5648/AD5668 have an on-chip reference with interface that operates at clock rates of up to 50 MHz and is an internal gain of 2. The AD5628-1/AD5648-1/AD5668-1 have compatible with standard SPI, QSPI, MICROWIRE, and a 1.25 V 5 ppm/C reference, giving a full-scale output range DSP interface standards. The on-chip precision output amplifier of 2.5 V the AD5628-2/AD5648-2/AD5668-2 and AD5668-3 have enables rail-to-rail output swing. a 2.5 V 5 ppm/C reference, giving a full-scale output range of 5 V. The on-board reference is off at power-up, allowing the use PRODUCT HIGHLIGHTS of an external reference. The internal reference is enabled via a 1. Octal, 12-/14-/16-bit DAC. software write. 2. On-chip 1.25 V/2.5 V, 5 ppm/C reference. 3. Available in 14-lead/16-lead TSSOP, 16-lead LFCSP, and The part incorporates a power-on reset circuit that ensures that the 16-ball WLCSP. DAC output powers up to 0 V (AD5628-1/AD5648-1/AD5668-1, 4. Power-on reset to 0 V or midscale. AD5628-2/AD5648-2/AD5668-2) or midscale (AD5668-3) and 5. Power-down capability. When powered down, the DAC remains powered up at this level until a valid write takes place. typically consumes 200 nA at 3 V and 400 nA at 5 V. The part contains a power-down feature that reduces the current consumption of the device to 400 nA at 5 V and provides software- Rev. J Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20052017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 05302-001AD5628/AD5648/AD5668 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 DAC Section ................................................................................ 22 Applications ....................................................................................... 1 Resistor String ............................................................................. 22 Functional Block Diagram .............................................................. 1 Internal Reference ...................................................................... 22 General Description ......................................................................... 1 Output Amplifier ........................................................................ 23 Product Highlights ........................................................................... 1 Serial Interface ............................................................................ 23 Revision History ............................................................................... 2 Input Shift Register .................................................................... 24 Specif icat ions ..................................................................................... 4 Interrupt .......................................................................... 24 SYNC AC Characteristics ........................................................................ 7 Internal Reference Register ....................................................... 25 Timing Characteristics ................................................................ 8 Power-On Reset .......................................................................... 25 Absolute Maximum Ratings ............................................................ 9 Power-Down Modes .................................................................. 25 Thermal Resistance ...................................................................... 9 Clear Code Register ................................................................... 25 ESD Caution .................................................................................. 9 Function .......................................................................... 27 LDAC Pin Configurations and Function Descriptions ......................... 10 Power Supply Bypassing and Grounding ................................ 27 Typical Performance Characteristics ........................................... 12 Outline Dimensions ....................................................................... 28 Terminology .................................................................................... 20 Ordering Guide .......................................................................... 30 Theory of Operation ...................................................................... 22 REVISION HISTORY 8/2011Rev. E to Rev. F 1/2017Rev. I to Rev. J Added 16-Ball WLCSP ...................................................... Universal Changes to Table 5 ............................................................................ 9 Added Figure 6 and Table 7 Renumbered Sequentially ........... 10 Added Thermal Resistance Section and Table 6 Renumbered Changes to Figure 32 and Figure 33............................................. 15 Sequentially ....................................................................................... 9 Updated Outline Dimensions ....................................................... 26 Changes to Figure 3 ........................................................................ 10 Changes to Ordering Guide .......................................................... 28 11/2014Rev. H to Rev. I 1/2011Rev. D to Rev. E Changes to Ordering Guide .......................................................... 29 Changes to AD5628 Relative Accuracy, Zero-Code Error, Offset Error, and Reference TC Parameters, Table 1 ................................ 3 2/2014Rev. G to Rev. H Changes to AD5628 Relative Accuracy, Zero-Code Error, Offset Changes to Figure 1 .......................................................................... 1 Error, and Reference TC Parameters, Table 2 ................................ 5 Change to Figure 6 ......................................................................... 10 Changes to Output Voltage Settling Time, Table 3 ....................... 6 Change to Table 7 ........................................................................... 10 Added Figure 53 Renumbered Sequentially .............................. 17 Changes to Figure 45, Figure 46, and Figure 47 ......................... 17 Change to Output Amplifier Section ........................................... 21 Changes to Ordering Guide .......................................................... 29 Changes to Ordering Guide .......................................................... 28 1/2013Rev. F to Rev. G Added WLCSP Reference TC of 15 ppm/C, Table 2 .................. 5 Changes to Ordering Guide .......................................................... 29 Rev. J Page 2 of 30

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