Product Information

AS7C31026B-10TCN

AS7C31026B-10TCN electronic component of Alliance Memory

Datasheet
SRAM 1M, 3.3V, 10ns, FAST 64K x 16 Asynch SRAM
Manufacturer: Alliance Memory
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 6.0611 ea
Line Total: USD 6.06

108 - Global Stock
Ships to you between
Tue. 28 May to Thu. 30 May
MOQ: 1  Multiples: 1
Pack Size: 1

 More Buying Options & Price Grid(s)

Availability Price Quantity
97 - WHS 1


Ships to you between Tue. 28 May to Thu. 30 May

MOQ : 1
Multiples : 1

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AS7C31026B-10TCN
Alliance Memory

1 : USD 5.865
10 : USD 5.3475
100 : USD 5.3015
270 : USD 5.29
1080 : USD 5.2325
2565 : USD 5.198
5130 : USD 4.853
10125 : USD 4.784

Read More Specifications

     
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RoHS - XON
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Supply Voltage - Min
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Additional Infomation About Product

AS7C31026B Revision History AS7C31026B Revision Details Date Rev 1.0 Initial Issue March. 2004 Rev 1.1 10ns TSOP II not offered due to poor yields April 2007 Rev 2.0 industrial temp TSOP II not offered due to poor yields - August 2009 refer to C die option for TSOP II. We can still offer in SOJ industrial temp. Please note modified from the original Alliance Semiconductor datasheet by Alliance Memory Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential 1/11 Rev.2.0 Aug.2009August 200 9 AS7C31026B 3.3 V 64K X 16 CMOS SRAM Features Industrial and commercial versions Easy memory expansion with CE, OE inputs Organization: 65,536 words 16 bits TTL-compatible, three-state I/O Center power and ground pins for low noise JEDEC standard packaging High speed - 44-pin 400 mil SOJ - 44-pin TSOP 2-400 - 10/12/15/20 ns address access time ESD protection 2000 volts - 5, 6, 7, 8 ns output enable access time Latch-up current 200 mA Low power consumption: ACTIVE - 288 mW / max 10 ns Low power consumption: STANDBY - 18 mW / max CMOS I/O 6 T 0.18 u CMOS technology Logic block diagram Pin arrangement A0 A1 44-Pin SOJ (400 mil), TSOP 2 V CC A2 64 K 16 GND A3 Array A4 1 44 A5 A4 2 43 A6 A3 A5 3 42 A7 A2 A1 4 41 OE A6 5 40 UB A0 A7 6 39 LB CE I/O15 I/O0 7 38 I/O0I/O7 I/O I/O1 8 37 I/O14 Control circuit buffer I/O8I/O15 9 36 I/O13 I/O2 10 35 I/O12 I/O3 V 11 34 GND CC Column decoder WE 12 33 V GND CC 13 32 I/O11 I/O4 I/O5 14 31 I/O10 15 30 I/O9 I/O6 16 29 I/O8 I/O7 UB WE 17 28 NC 18 27 A8 A15 OE 19 26 A9 A14 LB A13 20 25 A10 21 24 A11 A12 CE 22 23 NC NC Selection guide -10 -12 -15 -20 Unit Maximum address access time 10 12 15 20 ns Maximum output enable access time 56 7 8 ns Maximum operating current 80 75 70 65 mA Maximum CMOS standby current 55 5 5 mA August 2009, v 2.0 Alliance Semiconductor P. 2 of 1 1 Copyright Alliance Semiconductor. All rights reserved. Row decoder A8 A9 A10 A11 A12 A13 A14 A15 AS7C31026B

HS Compliance

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory

Alliance Memory may also be referenced as

ACM
ALLIANCE MEMORY, INC.
ALLIANCE SEMI

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