Product Information

AS6C62256A-70PIN

AS6C62256A-70PIN electronic component of Alliance Memory

Datasheet
SRAM 256K, 4.5-5.5V, 70ns 32K x 8 Asynch SRAM
Manufacturer: Alliance Memory
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete

 More Buying Options & Price Grid(s)

Availability Price Quantity
0 - WHS 1


Multiples : 150

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AS6C62256A-70PIN
Alliance Memory

N/A

Obsolete
0 - WHS 2

MOQ : 1
Multiples : 1

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AS6C62256A-70PIN
Alliance Memory

1 : USD 6.818
10 : USD 4.5797
30 : USD 4.524
60 : USD 4.4906
105 : USD 4.0894
255 : USD 4.0894
510 : USD 3.9334
1005 : USD 3.6103
2010 : USD 3.4877
N/A

Obsolete
0 - WHS 3

MOQ : 1
Multiples : 1

Stock Image

AS6C62256A-70PIN
Alliance Memory

1 : USD 5.1316
2 : USD 3.0482
9 : USD 2.9045
150 : USD 2.8429
N/A

Obsolete

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RoHS - XON
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Additional Infomation About Product

APRIL2009 AS6C62256A 32KX8BITLOWPOWERCMOSSRAM FEATURES DESCRIPTION The Read cycle is finished by the 32768x8 bit static CMOS RAM The AS6C62256A is a static RAM falling edge of W, or by the rising Access times 70 ns manufactured using a CMOS edge of E, respectively. process technology with the Common data inputs and data following operating modes: outputs Data retention is guaranteed down - Read - Standby Three-state outputs to 2 V. With the exception of E, all - Write - Data Retention Typ. operating supply current inputs consist of NOR gates, so that The memory array is based on a 6- o 70 ns: 50 mA no pull-up/pull-down resistors are transistor cell. TTL/CMOS-compatible required. Automatical reduction of power The circuit is activated by the falling dissipation in long Read Cycles edge of E. The address and control Power supply voltage 5V + 10% inputs open simultaneously. Operating temperature ranges According to the information of W o 0 to 70 C and G, the data inputs, or outputs, o -40 to 85 C are active. In a Read cycle, the data QS 9000 Quality Standard outputs are activated by the falling ESD protection > 2000 V edge of G, afterwards the data word (MIL STD 883C M3015.7) read will be available at the outputs Latch-up immunity >100 mA DQ0-DQ7. After the address Packages: PDIP28 (600 mil) change, the data outputs go High-Z SOP28 (330 mil) until the new information read is available. The data outputs have not preferred state. PINCONFIGURATION PINDESCRIPTION APRIL/2009 ALLIANCEMEMORY PAGE1of10APRIL2009 AS6C62256A 32KX8BITLOWPOWERCMOSSRAM APRIL/2009 ALLIANCEMEMORY PAGE2of10

HS Compliance

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory

Alliance Memory may also be referenced as

ACM
ALLIANCE MEMORY, INC.
ALLIANCE SEMI

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