Product Information

AS4C64M16D1A-6TIN

AS4C64M16D1A-6TIN electronic component of Alliance Memory

Datasheet
DRAM DDR1, 1GB, 2.5V 166MHz,64M x 16
Manufacturer: Alliance Memory
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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N/A

Obsolete

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0 - WHS 1

MOQ : 108
Multiples : 108

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AS4C64M16D1A-6TIN
Alliance Memory

108 : USD 21.18
216 : USD 20.592
540 : USD 20.592
1080 : USD 20.364
2160 : USD 19.908
N/A

Obsolete

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Additional Infomation About Product

AS4C64M16D1A Revision History 1Gb SDRAM-AS4C64M16D1A - 66pin TSOP II / 60ball FBGA PACKAGE Revision Details Date Rev 1.0 Datasheet Oct 2015 Rev 1.1 Add FBGA package - AS4C64M16D1A-BIN Mar 2019 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 64 - Rev.1.1 Mar. 2019 AS4C64M16D1A Features Overview Fast clock rate: 166MHz The 1Gb DDR SDRAM is a high-speed CMOS double data rate synchronous DRAM containing 1024 Mbits. It is Differential Clock CK & CK internally configured as a quad 16M x 16 DRAM with a synchronous interface (all signals are registered on the Bi-directional DQS positive edge of the clock signal, CK). Data outputs occur at both rising edges of CK and . Read CK DLL enable/disable by EMRS and write accesses to the SDRAM are burst oriented accesses start at a selected location and continue for a Fully synchronous operation programmed number of locations in a programmed sequence. Accesses begin with the registration of a Internal pipeline architecture BankActivate command which is then followed by a Read or Write command. The device provides programmable Read Four internal banks, 16M x 16-bit for each bank or Write burst lengths of 2, 4, or 8. An auto precharge function may be enabled to provide a self-timed row Programmable Mode and Extended Mode precharge that is initiated at the end of the burst sequence. registers The refresh functions, either Auto or Self Refresh are easy to - CAS Latency: 2, 2.5, 3 use. In addition, 1Gb DDR features programmable DLL - Burst length: 2, 4, 8 option. By having a programmable mode register and - Burst Type: Sequential & Interleaved extended mode register, the system can choose the most suitable modes to maximize its performance. These devices Individual byte write mask control are well suited for applications requiring high memory bandwidth result in a device particularly well suited to high DM Write Latency = 0 performance main memory and graphics applications. Auto Refresh and Self Refresh 8192 refresh cycles / 64ms Precharge & active power down Power supplies: VDD & VDDQ = 2.5V 0.2V Industrial Operating Temperature: T = -40~85C A Interface: SSTL 2 I/O Interface Package: - 66 Pin TSOP II, 0.65mm pin pitch - 60 Ball FBGA - Pb and Halogen free Table 1. Ordering Information Org Temperature Max Clock (MHz) Product part No Package Commercial 0C to 85C 64 x 16 66 Pin TSOPII AS4C64M16D1A-6TCN 166MHz Industrial -40C to 85C 66 Pin TSOPII 64 x 16 AS4C64M16D1A-6TIN 166MHz Industrial -40C to 85C 60 Ball FBGA 64 x 16 AS4C64M16D1A-6BIN 166MHz Confidential - 2 of 64 - Rev.1.1 Mar. 2019

HS Compliance

Tariff Desc

8542.32.00 -- Memories
               Monolithic integrated circuits:

Alliance Memory may also be referenced as

ACM
ALLIANCE MEMORY, INC.
ALLIANCE SEMI

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