Product Information

AS4C32M16SB-7TINTR

AS4C32M16SB-7TINTR electronic component of Alliance Memory

Datasheet
DRAM 512M 3.3V 143MHz 32M x 16 SDRAM

Manufacturer: Alliance Memory
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 18.8622 ea
Line Total: USD 18.86

4784 - Global Stock
Ships to you between
Fri. 10 May to Tue. 14 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
1377 - Global Stock


Ships to you between Fri. 10 May to Tue. 14 May

MOQ : 1
Multiples : 1

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AS4C32M16SB-7TINTR
Alliance Memory

1 : USD 15.9735
10 : USD 15.042
25 : USD 14.835
100 : USD 13.1905
250 : USD 12.6385
500 : USD 12.6385
1000 : USD 12.5695
2000 : USD 12.489
5000 : USD 12.144

     
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AS4C32M16SB-6TIN AS4C32M16SB-7TIN AS4C32M16SB-7TCN Revision History AS4C32M16SB-7TCN/AS4C32M16SB-7TIN/AS4C32M16SB-6TIN- 54pin TSOPII PACKAGE Revision Details Date Rev 1.0 Preliminary datasheet Jun 2016 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1/55 - Rev.1.0 June 2016AS4C32M16SB-6TIN AS4C32M16SB-7TIN AS4C32M16SB-7TCN Overview Features Fast access time from clock: 5/5.4 ns The 512Mb SDRAM is a high-speed CMOS Fast clock rate: 166/143 MHz synchronous DRAM containing 512 Mbits. It is internally configured as 4 Banks of 8M word x 16 Fully synchronous operation DRAM with a synchronous interface (all signals are Internal pipelined architecture registered on the positive edge of the clock signal, 8M word x 16-bit x 4-bank CLK). Read and write accesses to the SDRAM are Programmable Mode registers burst oriented accesses start at a selected location - CAS Latency: 2 or 3 and continue for a programmed number of locations - Burst Length: 1, 2, 4, 8, or full page in a programmed sequence. Accesses begin with the - Burst Type: Sequential or Interleaved registration of a Bank Activate command which is then followed by a Read or Write command. The - Burst stop function SDRAM provides for programmable Read or Write Auto Refresh and Self Refresh burst lengths of 1, 2, 4, 8, or full page, with a burst 8192 refresh cycles/64ms termination option. An auto precharge function may CKE power down mode be enabled to provide a self-timed row precharge that Single +3.3V 0.3V power supply is initiated at the end of the burst sequence. The Operating Temperature Range: refresh functions, either Auto or Self Refresh are easy to use. By having a programmable mode - Commercial: T = 0~70C A register, the system can choose the most suitable - Industrial: T = -40~85C A modes to maximize its performance. These devices Interface: LVTTL are well suited for applications requiring high memory 54-pin 400 mil plastic TSOP II package bandwidth and particularly well suited to high - Pb free and Halogen free performance PC applications. Table 1. Key Specifications AS4C32M16SB -6/7 tCK3 Clock Cycle time (min.) 6/7 tAC3 Access time from CLK (max.) 5/5.4 tRAS Row Active time (min.) 42/42 tRC Row Cycle time (min.) 60/63 Table 2. Ordering Information Part Number Frequency Package Temperature Temp Range AS4C32M16SB-7TCN 143MHz 54 Pin TSOP II Commercial 0C to 70C AS4C32M16SB-7TIN 143MHz 54 Pin TSOP II -40C to 85C Industrial AS4C32M16SB-6TIN 166MHz 54 Pin TSOP II Industrial -40C to 85C Confidential - 2/55 - Rev.1.0 June 2016

Tariff Desc

8542.32.00 -- Memories
               Monolithic integrated circuits:
ACM
ALLIANCE MEMORY, INC.
ALLIANCE SEMI

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