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AS4C128M16D2A-25BINTR

AS4C128M16D2A-25BINTR electronic component of Alliance Memory

Datasheet
DRAM DDR2, 2GB, 1.8V 400MHz,256M x 8
Manufacturer: Alliance Memory
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

2500: USD 13.5875 ea
Line Total: USD 33968.75

0 - Global Stock
MOQ: 2500  Multiples: 2500
Pack Size: 2500

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Ships to you between Thu. 30 May to Mon. 03 Jun

MOQ : 2500
Multiples : 2500

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AS4C128M16D2A-25BINTR
Alliance Memory

2500 : USD 11.8888

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Additional Infomation About Product

AS4C128M16D2A-25BCN AS4C128M16D2A-25BIN Revision History 2Gb AS4C128M16D2A - 84 ball FBGA PACKAGE Revision Details Date Rev 1.0 Preliminary datasheet Dec 2015 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1/63 - Rev.1.0 Dec 2015AS4C128M16D2A-25BCN AS4C128M16D2A-25BIN Overview Features The 2Gb DDR2 is a high-speed CMOS Double-Data- JEDEC Standard Compliant Rate-Two (DDR2), synchronous dynamic random - JEDEC standard 1.8V I/O (SSTL 18-compatible) access memory (SDRAM) containing 2048 Mbits in a 16- bit wide data I/Os. It is internally configured as a 8-bank Power supplies: V & V = +1.8V 0.1V DD DDQ DRAM, 8 banks x 16Mb addresses x 16 I/Os. The device Operating temperature: is designed to comply with DDR2 DRAM key features - Commercial (0 ~ 85 C) such as posted CAS with additive latency, Write latency - Industrial (-40 ~ 95 C) = Read latency -1, Off-Chip Driver (OCD) impedance Supports JEDEC clock jitter specification adjustment, and On Die Termination(ODT). Fully synchronous operation All of the control and address inputs are synchronized Fast clock rate: 400MHz with a pair of externally supplied differential clocks. Inputs Differential Clock, CK & CK are latched at the cross point of differential clocks (CK Bidirectional single/differential data strobe rising and CK falling). All I/Os are synchronized with a - DQS & DQS pair of bidirectional strobes (DQS and DQS ) in a source synchronous fashion. The address bus is used to convey 8 internal banks for concurrent operation row, column, and bank address information in RAS , 4-bit prefetch architecture CAS multiplexing style. Accesses begin with the Internal pipeline architecture registration of a Bank Activate command, and then it is Precharge & active power down followed by a Read or Write command. Read and write Programmable Mode & Extended Mode registers accesses to the DDR2 SDRAM are 4 or 8-bit burst Posted CAS additive latency (AL): 0, 1, 2, 3, 4, 5 oriented accesses start at a selected location and WRITE latency = READ latency - 1 t continue for a programmed number of locations in a CK programmed sequence. Operating the eight memory Burst lengths: 4 or 8 banks in an interleaved fashion allows random access Burst type: Sequential / Interleave operation to occur at a higher rate than is possible with DLL enable/disable standard DRAMs. An auto precharge function may be Off-Chip Driver (OCD) enabled to provide a self-timed row precharge that is - Impedance Adjustment initiated at the end of the burst sequence. A sequential - Adjustable data-output drive strength and gapless data rate is possible depending on burst On-die termination (ODT) length, CAS latency, and speed grade of the device. RoHS compliant Auto Refresh and Self Refresh 8192 refresh cycles / 64ms - Average refresh period 7.8s -40C TC +85C 3.9s +85C TC +95C Package: 84-ball 8 x 12.5 x 1.2mm (max) FBGA - Pb Free and Halogen Free Table 1. Speed Grade Information tRCD(ns) Speed Grade Clock Frequency CAS Latency tRP(ns) 12.5 12.5 DDR2-800 400MHz 5 Table 2. Ordering Information Org Temperature Max Clock (MHz) Product part No Package 400 84-ball FBGA AS4C128M16D2A-25B CN Commercial 0C to 85C 128Mx 16 400 AS4C128M16D2A-25B IN 84-ball FBGA Industrial -40C to 95C 128Mx 16 Confidential - 2/63 - Rev.1.0 Dec 2015

HS Compliance

Tariff Desc

8542.32.00 -- Memories
               Monolithic integrated circuits:

Alliance Memory may also be referenced as

ACM
ALLIANCE MEMORY, INC.
ALLIANCE SEMI

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