256Mb: x16, x32 Mobile LPDDR SDRAM Features Mobile Low-Power DDR SDRAM MT46H16M16LF 4 Meg x 16 x 4 Banks MT46H8M32LF 2 Meg x 32 x 4 Banks Options Marking Features V /V DD DDQ V /V = 1.701.95V DD DDQ 1.8V/1.8V H Bidirectional data strobe per byte of data (DQS) Configuration Internal, pipelined double data rate (DDR) architec- 16 Meg x 16 (4 Meg x 16 x 4 16M16 ture two data accesses per clock cycle banks) 8 Meg x 32 (2 Meg x 32 x 4 8M32 Differential clock inputs (CK and CK ) banks) Commands entered on each positive CK edge Row-size option DQS edge-aligned with data for READs center- JEDEC-standard option LF aligned with data for WRITEs 2 Reduced page-size option LG 4 internal banks for concurrent operation Plasticgree package 1 Data masks (DM) for masking write dataone mask 60-ball VFBGA (8mm x 9mm) BF 2 per byte 90-ball VFBGA (8mm x 13mm) B5 Programmable burst lengths (BL): 2, 4, 8, or 16 Timing cycle time 5ns CL = 3 (200 MHz) -5 Concurrent auto precharge option is supported 5.4ns CL = 3 (185 MHz) -54 Auto refresh and self refresh modes 6ns CL = 3 (166 MHz) -6 1.8V LVCMOS-compatible inputs 7.5ns CL = 3 (133 MHz) -75 On-chip temp sensor to control self refresh rate Operating temperature range Partial-array self refresh (PASR) Commercial (0 to +70C) None Deep power-down (DPD) Industrial (40C to +85C) IT Design revision :H Status read register (SRR) Selectable output drive strength (DS) 1. Only available for x16 configuration. Notes: Clock stop capability 2. Only available for x32 configuration. 64ms refresh Table 1: Configuration Addressing Reduced Page-Size 2 Architecture 16 Meg x 16 8 Meg x 32 Option Configuration 4 Meg x 16 x 2 Meg x 32 x 2 Meg x 32 4 banks 4 banks x 4 banks Refresh count 8K 4K 8K Row 8K A 12:0 4K A 11:0 8K A 12:0 addressing Column 512 A 8:0 512 A 8:0 256 A 7:0 addressing PDF: 09005aef834bf85b Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 256mb mobile ddr sdram t36n.pdf - Rev. I 09/10 EN 2008 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice.256Mb: x16, x32 Mobile LPDDR SDRAM Features Figure 1: 256Mb Mobile LPDDR Part Numbering MT 46 H 16M16 LF BF -6 IT :H Micron Technology Revision :H Product family 46 = Mobile DDR SDRAM Operating temperature Blank = Commercial (0C to +70C) Operating voltage IT = Industrial (40C to +85C) H = 1.8V/1.8V Cycle time t Configuration -5 = 5ns CK, CL = 3 t 16 Meg x 16 -54 = 5.4ns CK, CL = 3 t 8 Meg x 32 -6 = 6ns CK, CL = 3 t -75 = 7.5ns CK, CL = 3 Addressing LF = Mobile standard addressing Package codes LG = Reduced page-size addressing BF = 8mm x 9mm VFBGA green B5 = 8mm x 13mm VFBGA green FBGA Part Marking Decoder Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the part number. Microns FBGA part marking decoder is available at www.micron.com/decoder. PDF: 09005aef834bf85b Micron Technology, Inc. reserves the right to change products or specifications without notice. 2 256mb mobile ddr sdram t36n.pdf - Rev. I 09/10 EN 2008 Micron Technology, Inc. All rights reserved.