LogiCORE IP 3GPP LTE MIMO Decoder v3.0 PB020 (v3.0) November 18, 2015 Product Brief Introduction LogiCORE IP Facts Table Core Specifics The Xilinx LogiCORE IP LTE MIMO Decoder UltraScale+ Families v3.0 implements the uplink MIMO decoding UltraScale Architecture Supported (1) Device Family functions for applications following the 3rd Zynq-7030, Zynq-7045 Virtex-7, Kintex-7 Generation Partnership Projects (3GPP) Evolved Supported User Universal Radio Access (E-UTRA) Physical AXI4-Stream Interfaces Channels and Modulation (Release 11), 3GPP TS Provided with Core 36.211 V11.0.0 (2012-09) specification Ref 1 . Design Files Encrypted RTL Example Design Not Provided Additional Documentation Test Bench Contact Xilinx Support Constraints File Not Provided A product guide is available for this core. VHDL Behavioral Access to this material can be requested by Simulation VHDL or Verilog Simulation Model Model clicking on this registration link: Bit Accurate C Model www.xilinx.com/member/ (2) Tested Design Tools 3gpp lte mimo decoder eval/index.htm. Design Entry Vivado Design Suite Tools MMSE MIMO Decoder for spatial For supported simulators, see the multiplexing MIMO systems Simulation Xilinx Design Tools: Release Notes Guide. Compliance with 3GPP-LTE specification, Synthesis Tools Vivado Synthesis AXI4-Stream interface Support Key component of Xilinx LTE Baseband Provided by Xilinx www.xilinx.com/support Targeted Design Platform Notes: High resource efficiency 1. For a complete list of supported devices, see the Vivado IP Supports four receive and four transmit catalog. 2. For the supported versions of the tools, see the antennas (4x4 spatial multiplexing MIMO Xilinx Design Tools: Release Notes Guide. system) Supports up to four antennas at the base station Supports up to four mobiles with one transmit antenna each, in MU-MIMO mode Supports one mobile with up to four transmit antennas in SU-MIMO mode Support for receive diversity only mode Synchronous clear input clock enable input Copyright 20142015 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. AMBA, AMBA Designer, ARM, ARM1176JZ-S, CoreSight, Cortex, and PrimeCell are trademarks of ARM in the EU and other countries. All other trademarks are the property of their respective owners. 3GPP LTE MIMO Decoder v3.0 www.xilinx.com 1 PB020 (v3.0) November 18, 2015 Product SpecificationProduct Brief Applications Base station applications implementing eNodeB following the LTE specification Ref 1 . The LTE MIMO Decoder v3.0 can perform the MMSE MIMO decoding function for uplink reception. Applications that can use a spatial multiplexing MMSE MIMO decoder that meet the timing and latency constraints of the LTE specification Ref 1 . The LTE MIMO Decoder v3.0 is designed to fulfill the demanding processing requirements of MIMO decode in evolved 3GPP-LTE compliant base stations. A high level block diagram of the MIMO decoder and its location in the uplink system is shown in Figure 1. It is an MMSE MIMO decoder for spatial multiplexing MU-MIMO or SU-MIMO systems and is also optimized for receive diversity only systems. The core has been designed to meet the 3GPP-LTE timing and latency constraints. X-Ref Target - Figure 1 HANNE L A% MS ECEI R VE OM& R 2EOVE M && 4 & 4 ENNA AN S T 0 E CODE R Figure 1: Block Diagram of a 3GPP-LTE Uplink Receiver References 1. 3rd Generation Partnership Projects (3GPP) Evolved Universal Radio Access (E-UTRA) Physical Channels and Modulation (Release 11), 3GPP TS 36.211 V11.0.0 (2012-09) 2. LogiCORE IP 3GPP LTE MIMO Decoder v3.0 Product Guide (PG123), registration required. 3. Vivado AXI Reference Guide (UG1037) Technical Support Xilinx provides technical support at www.xilinx.com/support for this LogiCORE IP product when used as described in the product documentation. Xilinx cannot guarantee timing, functionality, or support of product if implemented in devices that are not defined in the documentation, if customized beyond that allowed in the product documentation, or if changes are made to any section of the design labeled DO NOT MODIFY. For the master Answer Record related to the 3GPP LTE MIMO Decoder core, see AR: 54468. 3GPP LTE MIMO Decoder v3.0 www.xilinx.com 2 Send Feedback PB020 (v3.0) November 18, 2015 ) -) -/ TITE