TC58NVG2S3EBAI5 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 2 4 GBIT (512M 8 BIT) CMOS NAND E PROM DESCRIPTION The TC58NVG2S3E is a single 3.3V 4 Gbit (4,429,185,024 bits) NAND Electrically Erasable and Programmable 2 Read-Only Memory (NAND E PROM) organized as (2048 64) bytes 64 pages 4096blocks. The device has two 2112-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 2112-byte increments. The Erase operation is implemented in a single block unit (128 Kbytes 4 Kbytes: 2112 bytes 64 pages). The TC58NVG2S3E is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and other systems which require high-density non-volatile memory data storage. FEATURES Organization x8 Memory cell array 2112 256K 8 Register 2112 8 Page size 2112 bytes Block size (128K 4K) bytes Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Program, Multi Block Erase, Multi Page Copy, Multi Page Read Mode control Serial input/output Command control Number of valid blocks Min 4016 blocks Max 4096 blocks Power supply V 2.7V to 3.6V CC Access time Cell array to register 30 s max Serial Read Cycle 25 ns min (CL=100pF) Program/Erase time Auto Page Program 300 s/page typ. Auto Block Erase 2.5 ms/block typ. Operating current Read (25 ns cycle) 30 mA max. Program (avg.) 30 mA max Erase (avg.) 30 mA max Standby 50 A max Package P-TFBGA63-1013-0.80AZ (Weight: 0.18 g typ.) 1 2012-09-01 TC58NVG2S3EBAI5 PIN ASSIGNMENT (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 A NC NC NC NC B NC NC NC C ALE V WP CE WE RY/BY SS D NC CLE NC NC NC RE E NC NC NC NC NC NC F NC NC NC NC NC NC G NC NC NC NC NC NC H NC I/O1 NC NC NC V CC J NC I/O2 NC V I/O6 I/O8 CC K V I/O3 I/O4 I/O5 I/O7 V SS SS L NC NC NC NC M NC NC NC NC PINNAMES I/O1 to I/O8 I/O port CE Chip enable WE Write enable RE Read enable CLE Command latch enable ALE Address latch enable WP Write protect RY/BY Ready/Busy V Power supply CC V Ground SS 2 2012-09-01