SI5023-EVB Silicon Labs

Si5023 MULTI-RATE SONET/SDH CDR IC WITH LIMITING AMPLIFIER Features High-speed clock and data recovery device with integrated limiting amp: Supports OC-48/12/3, STM-16/4/ Bit error rate alarm 1, Gigabit Ethernet, and 2.7 Gbps Reference and referenceless FEC operation supported Loss-of-signal level alarm DSPLL technology Data slicing level control Jitter generation 3.0 mUI rms (TYP) 10 mV differential sensitivity PP Ordering Information: Small footprint: 5 x 5 mm 3.3 V supply See page 25. Applications SONET/SDH/ATM routers SONET/SDH test equipment Pin Assignments Add/drop multiplexers Optical transceiver modules Si5023 Digital cross connects SONET/SDH regenerators Gigabit Ethernet interfaces Board level serial links Description 28 27 26 25 24 23 22 RATESEL0 1 21 VDD RATESEL1 REXT 2 20 The Si5023 is a fully-integrated, high-performance limiting amp and clock LOS LVL RESET/CAL 3 19 and data recovery (CDR) IC for high-speed serial communication systems. GND SLICE LVL 4 18 VDD Pad It derives timing information and data from a serial input at OC-48/12/3, REFCLK+ 5 17 DOUT+ STM-16/4/1, or Gigabit Ethernet (GbE) rates. Support for 2.7 Gbps data REFCLK DOUT 6 16 streams is also provided for OC-48/STM-16 applications that employ LOL 7 15 GND 8 9 10 11 12 13 14 forward error correction (FEC). Use of an external reference clock is optional. Silicon Laboratories DSPLL technology eliminates sensitive noise entry points, thus making the PLL less susceptible to board-level interaction and helping to ensure optimal jitter performance. Top View The Si5023 represents a new standard in low jitter, low power, small size, and integration for high-speed LA/CDRs. It operates from a 3.3 V supply over the industrial temperature range (40 to 85 C). Functional Block Diagram LOS LVL Signal DSQLCH Detect LOS 2 DOUT+ Retimer BUF DOUT DIN+ 2 Limiting DSPLL DIN Amp 2 CLKOUT+ BER BUF Monitor CLKOUT CLK DSBL REFCLK+ 2 Lock REFCLK Detection 2 (Optional) Reset/ Bias Gen. Calibration BER ALM REXT RESET/CAL BERMON RATESEL SLICE LVL BER LVL LOL LTR Rev. 1.3 6/08 Copyright 2008 by Silicon Laboratories Si5023 LTR BERMON LOS BER ALM BER LVL DSQLCH VDD VDD CLKDSBL DIN+ CLKOUT+ DIN CLKOUT VDDSi5023 2 Rev. 1.3