Datasheet 4.5V to 18V, 3A 1ch Synchronous Buck Converter BD95835EFJ Description Features BD95835EFJ is a 1ch synchronous buck converter that Input Voltage Range: 4.5V to 18.0V can generate a wide range of output voltage at the input Output Current: 3.0A (Max.) voltage range (4.5V to 18V). Space-saving and high Reference Voltage: 0.750V1.2% efficient switching regulator can be achieved due to Output Voltage Range: 0.9V to VIN x 0.7 built-in N-MOSFET power transistors. The IC also Using switching frequency 200kHz Freq 600kHz incorporates constant ON TIME control mode which Output Voltage Range: 0.9V to VIN x 0.6 facilitates ultra-high transient response against changes Using switching frequency 600kHz Freq 800kHz in load. Variable soft start function, short circuit Built-in Power MOS FET protection and over voltage protection are incorporated. High-side Nch FET ON resistance: 100m(typ.) The BD95835EFJ is designed for power supplies for Low-side Nch FET ON resistance: 100m(typ.) Digital AV Equipment. Fast Transient Responses due to ON TIME control Over Current Protection (OCP) Applications Thermal Shut Down (TSD) LCD TVs Under-Voltage Lock-Out (UVLO) Set Top Boxes (STB) Short Circuit Protection (SCP) DVD/Blu-ray players/recorders Over Voltage Protection (OVP) Broadband Network and Communication Interface Variable Soft Start Amusement, other. Package W(Typ.) x D(Typ.) x H(Max.) HTSOP-J8 4.90mm x 6.00mm x 1.00mm Typical Application Pin Configuration (TOP VIEW) (TOP VIEW) 1 8 SS BST VIN 2 7 EN 3 6 RT SW Thermal Pad GND 4 5 FB (to be shorted to GND) Figure 2. Pin Configuration VIN L VOUT Figure 1. Typical Application Circuit Product structureSilicon monolithic integrated circuit This product is not designed protection against radioactive rays. www .rohm.com TSZ02201-0333AAC00210-1-2 2013 ROHM Co., Ltd. All rights reserved. 1/20 29.May.2013 Rev.004 TSZ2211114001 BST SS VIN EN SW RT GND FBDatasheetDatasheet BD95835EFJ Block Diagram VIN 7. EN 5V VREF VREG 1. BST UVLO 2. VIN TSD IBIAS + 5. FB +CMP LVS S VIN - 3. SW FB LOGIC OVP VREG 6. RT SCP ONTIME R OCP OCPH Timer SoftStart OCPL 8. SS 4. GND Figure 3. Block Diagram Pin Description No. Symbol Description High side FET Gate Driver Power Supply pin. 1 BST Connect 0.1F capacitor and 82 resistor between BST and SW. BOOT voltage swings from VREG to (VIN + VREG) during normal switching operation. Input Voltage Supply pin. 2 VIN Connect over 10F ceramic capacitors for decoupling to PGND as near as these pins. Switch node connection between High side FET source and Low side FET drain. 3 SW Connected to inductor (L). 4 GND GND pin for the IC. Output Voltage Feedback pin. 5 FB FB is compared with REF in the IC. 6 RT Connect a resistor to determine ONTIME. Enable Input pin. 7 EN When the input voltage of the EN pin reaches at least 1.2V, the switching regulator becomes active. At the voltage less than 0.2 V, the IC becomes standby mode. 8 SS Connect a capacitor to determine soft start time. www .rohm.com TSZ02201-0333AAC00210-1-2 2013 ROHM Co., Ltd. All rights reserved. 2/20 29.May.2013 Rev.004 TSZ2211115001