Product Specification PE43503 50 RF Digital Attenuator 5-bit, 31 dB, 9 kHz - 6.0 GHz Product Description Features The PE43503 is a HaRP-enhanced, high linearity, 5-bit RF HaRP-enhanced UltraCMOS device Digital Step Attenuator (DSA) covering a 31 dB attenuation range in 1 dB steps. The Peregrine 50 RF DSA provides a Attenuation: 1 dB steps to 31 dB serial CMOS control interface. It maintains high attenuation High Linearity: Typical +58 dBm IP3 accuracy over frequency and temperature and exhibits very low insertion loss and low power consumption. Performance does Excellent low-frequency performance not change with Vdd due to on-board regulator. This next 3.3 V or 5.0 V Power Supply Voltage generation Peregrine DSA is available in a 4x4 mm 24-lead QFN footprint. Fast switch settling time Programming Modes: The PE43503 is manufactured on Peregrines UltraCMOS Direct Parallel process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance Latched Parallel of GaAs with the economy and integration of conventional Serial CMOS. High-attenuation state power-up (PUP) CMOS Compatible No DC blocking capacitors required Figure 1. Package Type Packaged in a 24-lead 4x4x0.85 mm QFN 24-lead 4x4x0.85 mm QFN Package Figure 2. Functional Schematic Diagram Switched Attenuator Array RF Output RF Input 5 Parallel Control Serial In Control Logic Interface CLK LE A0 A1 A2 P/S Document No. 70-0252-05 www.psemi.com 2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 11 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: PE43503 Product Specification Table 1. Electrical Specifications +25C, V = 3.3 V or 5.0 V DD Parameter Test Conditions Frequency Min. Typical Max. Units Frequency Range 9 kHz 6 GHz Attenuation Range 1 dB Step 0 31 dB Insertion Loss 9 kHz 6 GHz 2.4 2.9 dB 0dB - 31dB Attenuation settings 9 kHz 4 GHz (0.3+3%) dB 0dB - 21dB Attenuation settings 4 GHz 6 GHz +0.4+9% dB Attenuation Error 22dB - 31dB Attenuation settings 4 GHz 6 GHz +2.4+0% dB 0dB - 31dB Attenuation settings 4 GHz 6 GHz -0.2-3% dB Relative Phase All States 9 kHz 6 GHz 72 P1dB (note 1) Input 20 MHz - 6 GHz 30 32 dBm Input IP3 Two tones at +18 dBm, 20 MHz spacing 20 MHz 6 GHz +58 dBm Return Loss DC 6 GHz 17 dB Switching Speed 50% DC CTRL to 10% / 90% RF 650 ns Typical Spurious Value 1 MHz -115 dBm Video Feed Through 10 mVpp RF Trise/Tfall 10% / 90% RF 400 ns RF settled to within 0.05 dB of final value Settling Time 4 s RBW = 5 MHz, Averaging ON. Note 1. Please note Maximum Operating Pin (50 ) of +23dBm as shown in Table 3. Performance Plots Figure 3. 1dB Step Error vs. Frequency * Figure 4. 1dB Attenuation vs. Attenuation State Attenuation 200MHz 900MHz 1800MHz 2200MHz 3000MHz 4000MHz 5000MHz 6000MHz 35 2 30 900 MHz 2200 MHz 3800 MHz 25 5800 MHz 1 20 15 0 10 5 0 -1 035 1015 2025 305 0 4 8 121620 242832 Attenuation Setting (dB) Attenuation State *Monotonicity is held so long as Step-Error does not cross below -1 Figure 5. 1dB Major State Bit Error Figure 6. 1dB Attenuation Error vs. Frequency 200MHz 900MHz 1800MHz 2200MHz 1dB State 2dB State 4dB State 3000MHz 4000MHz 5000MHz 6000MHz 8dB State 16dB State 31dB State 2 2 1.5 1.5 1 1 0.5 0.5 0 0 -0.5 -0.5 -1 -1 -1.5 -1.5 -2 -2 0 1000 2000 3000 4000 5000 6000 0 4 8 12162024 2832 Frequency (GHz) Attenuation Setting (dB) 2008-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0252-05 UltraCMOS RFIC Solutions Page 2 of 11 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: