74LVU04D

74LVU04 Hex unbuffered inverter Rev. 7 18 September 2014 Product data sheet 1. General description The 74LVU04 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HCU04. The 74LVU04 is a general purpose hex inverter. Each of the six inverters is a single stage with unbuffered outputs. 2. Features and benefits Wide operating voltage: 1.0 V to 5.5 V Optimized for low voltage applications: 1.0 V to 3.6 V Typical output ground bounce < 0.8 V at V = 3.3 V and T = 25 C CC amb Typical HIGH-level output voltage (V ) undershoot: > 2 V at V = 3.3 V and OH CC T = 25 C amb ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 Cto+85 C and from 40 Cto+125 C 3. Applications Linear amplifier Crystal oscillator Astable multivibrator74LVU04 NXP Semiconductors Hex unbuffered inverter 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVU04N 40 Cto+125 C DIP14 plastic dual in-line package 14 leads (300 mil) SOT27-1 74LVU04D 40 Cto+125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74LVU04DB 40 Cto+125 C SSOP14 plastic shrink small outline package 14 leads SOT337-1 body width 5.3 mm 74LVU04PW 40 Cto+125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74LVU04BQ 40 Cto+125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1 thin quad flat package no leads 14 terminals body 2.5 3 0.85 mm 5. Functional diagram < < < V V V CC CC CC < < 100 170 nA nY < 001aah110 D P Q D P Q Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Circuit diagram (one inverter) 74LVU04 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 7 18 September 2014 2 of 20