Product Information

KSZ8864CNXCA-TR

KSZ8864CNXCA-TR electronic component of Microchip

Datasheet
Ethernet ICs 4-Port 10/100 Switch w/ 2x MAC I/F, MII, RMII

Manufacturer: Microchip
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1000: USD 5.6886 ea
Line Total: USD 5688.6

0 - Global Stock
MOQ: 1000  Multiples: 1
Pack Size: 1
Availability Price Quantity
0 - WHS 1


Ships to you between Tue. 21 May to Mon. 27 May

MOQ : 1000
Multiples : 1

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KSZ8864CNXCA-TR
Microchip

1000 : USD 5.6886
2000 : USD 5.3716
3000 : USD 5.2621

0 - WHS 2


Ships to you between Tue. 21 May to Mon. 27 May

MOQ : 1000
Multiples : 1000

Stock Image

KSZ8864CNXCA-TR
Microchip

1000 : USD 8.7945

     
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Duplex
Pd - Power Dissipation
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KSZ8864CNX/RMNUB Integrated 4-Port 10/100 Managed Switch with Two MACs MII or RMII Interfaces Programmable Weighted Fair Queuing for Ratio Features Control Advanced Switch Features Re-Mapping of 802.1p Priority Field Per Port IEEE 802.1q VLAN Support for up to 128 VLAN Basis Groups (Full-Range 4096 of VLAN IDs) Integrated 4-Port 10/100 Ethernet Switch Static MAC Table Supports up to 32 Entries New Generation Switch with Four MACs and Four VLAN ID Tag/Untagged Options, Per Port Basis PHYs that are Fully Compliant with the IEEE IEEE 802.1p/q Tag Insertion or Removal on a Per 802.3u Standard Port Basis Based on Ingress Port (Egress) Non-Blocking Switch Fabric Ensures Fast Packet Programmable Rate Limiting at the Ingress and Delivery by Utilizing a 1K MAC Address Lookup Egress on a Per Port Basis Table and a Store-and-Forward Architecture Jitter-Free Per Packet Based Rate Limiting Sup- On-Chip 64Kbyte Memory for Frame Buffering port (Not Shared with 1K Unicast Address Table) Broadcast Storm Protection with Percentage Con- Full-Duplex IEEE 802.3x Flow Control (PAUSE) trol (Global and Per Port Basis) with Force Mode Option IEEE 802.1d Rapid Spanning Tree Protocol RSTP Half-Duplex Back Pressure Flow Control Support HP Auto MDI/MDI-X and IEEE Auto Crossover Tail Tag Mode (1 Byte Added Before FCS) Sup- Support port at Port 4 to Inform the Processor Which LinkMD TDR-Based Cable Diagnostics to Iden- Ingress Port Receives the Packet tify Faulty Copper Cabling 1.4 Gbps High-Performance Memory Bandwidth MII Interface of MAC Supports Both MAC Mode and Shared Memory Based Switch Fabric with and PHY Mode Fully Non-Blocking Configuration Per Port LED Indicators for Link, Activity, and 10/ Dual MII/RMII with MAC 3 SW3-MII/RMII and 100 Speed MAC 4 SW4-MII/RMII Interfaces Register Port Status Support for Link, Activity, Enable/Disable Option for Huge Frame Size up to Full-/Half-Duplex and 10/100 Speed 2000 Bytes Per Frame On-Chip Terminations and Internal Biasing Tech- IGMP v1/v2 Snooping (IPv4) Support for Multicast nology for Cost Down and Lowest Power Con- Packet Filtering sumption IPv4/IPv6 QoS Support Switch Monitoring Features Support Unknown Unicast/Multicast Address and Port Mirroring/Monitoring/Sniffing: Ingress and/or Unknown VID Packet Filtering Egress Traffic to Any Port or MII/RMII Self-Address Filtering MIB Counters for Fully Compliant Statistics Gath- Comprehensive Configuration Register Access ering 34 MIB Counters Per Port Serial Management Interface (MDC/MDIO) to All Loopback Support for MAC, PHY, and Remote PHYs Registers and SMI Interface (MDC/MDIO) Diagnostic of Failure to All Registers Interrupt for the Link Change on Any Ports 2 High-Speed SPI (up to 25 MHz) and I C Master Low-Power Dissipation Interface to all Internal Registers Full-Chip Software Power-Down and Per Port I/O Pins Strapping and EEPROM to Program Software Power-Down Selective Registers in Unmanaged Switch Mode Energy-Detect Mode Support <0.1W Full-Chip Control Registers Configurable on the Fly (Port- Power Consumption When All Ports Have No Priority, 802.1p/d/q, AN) Activity QoS/CoS Packet Prioritization Support Very-Low Full-Chip Power Consumption (~0.3W), Per Port, 802.1p and DiffServ-Based without Extra Power Consumption on Transform- 1/2/4-Queue QoS Prioritization Selection ers 2016 Microchip Technology Inc. DS00002229A-page 1KSZ8864CNX/RMNUB Dynamic Clock Tree Shutdown Feature Voltages: - Analog VDDAT 3.3V Only - VDDIO Support 3.3V, 2.5V, and 1.8V - Low 1.2V Core Power Commercial Temperature Range: 0C to +70C Industrial Temperature Range: 40C to +85C Automotive AEC-Q100 Grade 3 Temperature Range: 40C to +85C Available in 64-pin QFN, Lead-Free Small Package Target Applications VoIP Phone Set-Top/Game Box Automotive Ethernet Industrial Control IPTV POF SOHO Residential Gateway Broadband Gateway/Firewall/VPN Integrated DSL/Cable Modem Wireless LAN Access Point + Gateway Standalone 10/100 Switch Embedded System DS00002229A-page 2 2016 Microchip Technology Inc.

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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