60A CY7C460A/CY7C462A CY7C464A/CY7C466A Asynchronous, Cascadable 8K/16K/32K/64K x9 FIFOs Features Functional Description High-speed, low-power, first-in first-out (FIFO) The CY7C460A, CY7C462A, CY7C464A, and CY7C466A are memories respectively, 8K, 16K, 32K, and 64K words by 9-bit wide first-in first-out (FIFO) memories. Each FIFO memory is organized 8K x 9 FIFO (CY7C460A) such that the data is read in the same sequential order that it 16K x 9 FIFO (CY7C462A) was written. Full and Empty flags are provided to prevent over- 32K x 9 FIFO (CY7C464A) run and underrun. Three additional pins are also provided to 64K x 9 FIFO (CY7C466A) facilitate unlimited expansion in width, depth, or both. The 10-ns access times, 20-ns read/write cycle times depth expansion technique steers the control signals from one device to another by passing tokens. High-speed 50-MHz read/write independent of depth/width The read and write operations may be asynchronous each Low operating power can occur at a rate of up to 50 MHz. The write operation occurs when the Write (W) signal is LOW. Read occurs when Read I = 60 mA CC (R) goes LOW. The nine data outputs go to the high-imped- I =8 mA SB ance state when R is HIGH. Asynchronous read/write A Half Full (HF) output flag is provided that is valid in the stan- Empty and Full flags dalone (single device) and width expansion configurations. In Half Full flag (in standalone mode) the depth expansion configuration, this pin provides the ex- Retransmit (in standalone mode) pansion out (XO) information that is used to tell the next FIFO that it will be activated. TTL-compatible Width and Depth Expansion Capability In the standalone and width expansion configurations, a LOW on the Retransmit (RT) input causes the FIFOs to retransmit 5V 10% supply the data. Read Enable (R) and Write Enable (W) must both be PLCC, LCC, 300-mil and 600-mil DIP packaging HIGH during a retransmit cycle, and then R is used to access Three-state outputs the data. Pin compatible density upgrade to CY7C42X/46X family The CY7C460A, CY7C462A, CY7C464A, and CY7C466A are Pin compatible and functionally equivalent to IDT7205, fabricated using Cypresss advanced 0.5 RAM3 CMOS tech- IDT7206, IDT7207, IDT7208 nology. Input ESD protection is greater than 2000V and latch-up is prevented by careful layout and the use of guard rings. Pin Configurations Logic BlockDiagram DATAINPUTS DIP (D D ) PLCC/LCC 0 8 Top View Top View 1 28 V W CC 2 27 D D WRITE 4 3 2 1 32 31 30 8 4 W D 2 D CONTROL 5 29 3 26 6 D D 5 3 DUAL PORT D 6 28 D RAM ARRAY 1 7 D 4 25 D 2 6 WRITE 8K x 9 READ NC D 7 27 0 5 D 24 D POINTER 16K x 9 POINTER 1 7 7C460A 7C460A 32K x 9 XI FL/RT 8 26 6 D 23 0 FL/RT 64K x 9 7C462A 7C462A FF 9 25 MR 7C464A XI 7 7C464A 22 MR 7C466A Q 7C466A 0 10 24 EF FF 8 21 EF Q XO/HF 1 11 23 Q 9 20 0 XO/HF THREE NC Q 7 12 22 Q 10 19 Q STATE 1 7 Q Q 2 13 21 BUFFERS 6 Q 11 Q 18 2 6 14 15 16 17 18 19 20 Q 12 Q 17 3 5 DATAOUTPUTS Q 13 Q 16 8 4 (Q -Q ) 0 8 15 GND 14 R MR RESET C46XA2 LOGIC FL/RT READ R CONTROL C46XA3 FLAG EF LOGIC FF EXPANSION LOGIC XI XO/HF C46XA1 Cypress Semiconductor Corporation 3901NorthFirstStreet SanJose CA 95134 408-943-2600 Document : 38-06011 Rev. *A Revised December 26, 2002 Q D 3 3 Q D 8 8 GND W NC NC R V cc Q D 4 4 Q D 5 5 CY7C460A/CY7C462A CY7C464A/CY7C466A Selection Guide 7C460A-10 7C460A-15 7C460A-25 7C462A-10 7C462A-15 7C462A-25 7C464A-10 7C464A-15 7C464A-25 7C466A-10 7C466A-15 7C466A-25 Frequency (MHz) 50 40 28.5 Maximum Access Time (ns) 10 15 25 1 Output Current, into Outputs (LOW)............................ 20 mA Maximum Ratings Static Discharge Voltage............................................ >2001V (Above which the useful life may be impaired. For user guide- (per MIL-STD-883, Method 3015) lines, not tested.) Latch-Up Current..................................................... >200 mA Storage Temperature ..................................65C to +150C Ambient Temperature with Operating Range Power Applied.............................................55C to +125C Ambient Supply Voltage to Ground Potential............... 0.5V to +7.0V Range Temperature V CC DC Voltage Applied to Outputs Commercial 0C to + 70C 5V 10% in High Z State ............................................... 0.5V to +7.0V Industrial 40C to +85C 5V 10% DC Input Voltage............................................ 0.5V to +7.0V 2 Power Dissipation ..........................................................1.0W Military 55C to +125C 5V 10% 3 Electrical Characteristics Over the Operating Range 7C460A/462A/464A/466A (-10,-15,-25) Parameter Description Test Conditions Min. Max. Unit V Output HIGH Voltage V = Min., I = 2.0 mA 2.4 V OH CC OH V Output LOW Voltage V = Min., I = 8.0 mA 0.4 V OL CC OL V Input HIGH Voltage 2.2 V V IH CC V Input LOW Voltage 0.5 0.8 V IL I Input Leakage Current GND < V < V 10 +10 A IX I CC I Output Leakage Current R > V , GND < V < V 10 +10 A OZ IH O CC I Operating Current V = Max., 60 mA CC CC I = 0 mA, Freq. = 20 MHz OUT I Standby Current All Inputs = V min. 8 mA SB IH 5 Capacitance Parameter Description Test Conditions Max. Unit C Input Capacitance T = 25C, f = 1 MHz, 10 pF IN A V = 4.5V CC C Output Capacitance 12 pF OUT Notes: 1. The Voltage on any input or I/O pin cannot exceed the power pin during power-up. 2. T is the instant on case temperature. A 3. See the last page of this specification for Group A subgroup testing information. 4. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 1 second. 5. Tested initially and after any design or process changes that may affect these parameters. Document : 38-06011 Rev. *A Page 2 of 15