FUJITSU SEMICONDUCTOR DS07-13728-3E DATA SHEET 16-bit Proprietary Microcontroller CMOS 2 F MC-16LX MB90455 Series MB90F455 (S) /F456 (S) /F457 (S) MB90455 (S) /456 (S) /457 (S) /V495G DESCRIPTION MB90455 series devices are general-purpose high-performance 16-bit micro controllers designed for process control of consumer products, which require high-speed real-time processing. 2 The system, inheriting the architecture of F MC* family, employs additional instruction ready for high-level lan- guages, expanded addressing mode, enhanced multiply-divide instructions, and enriched bit-processing instruc- tions. Furthermore, employment of 32-bit accumulator achieves processing of long-word data (32 bits). The peripheral resources of MB90455 series include the following: 8/10-bit A/D converter, UART 1, 8/16-bit PPG timer, 16-bit input-output timer (16-bit free-run timer, input capture 0, 1, 2, 3 (ICU)). 2 *: F MC, an abbreviation for FUJITSU Flexible Microcontroller, is a registered trademark of FUJITSU Ltd. FEATURES Clock Built-in PLL clock frequency multiplication circuit Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and multiplication of 1 to 4 times of oscillation clock (for 4-MHz oscillation clock, 4 MHz to 16 MHz). Operation by sub-clock (8.192 kHz) is allowed. Minimum execution time of instruction: 62.5 ns (when operating with 4-MHz oscillation clock, and 4-time multi- plied PLL clock). (Continued) PACKAGE 48-pin plastic-LQFP (FPT-48P-M26) MB90455 Series 16 Mbyte CPU memory space 24-bit internal addressing Instruction system best suited to controller Wide choice of data types (bit, byte, word, and long word) Wide choice of addressing modes (23 types) Enhanced multiply-divide instructions and RETI instructions Enhanced high-precision computing with 32-bit accumulator Instruction system compatible with high-level language (C language) and multitask Employing system stack pointer Enhanced various pointer indirect instructions Barrel shift instructions Increased processing speed 4-byte instruction queue Powerful interrupt function with 8 levels and 34 factors Automatic data transfer function independent of CPU 2 Expanded intelligent I/O service function (EI OS): Maximum of 16 channels Low power consumption (standby) mode Sleep mode (a mode that halts CPU operating clock) Time-base timer mode (a mode that operates oscillation clock, sub clock, time-base timer and clock timer only) Clock mode (a mode that operates sub clock and clock timer only) Stop mode (a mode that stops oscillation clock and sub clock) CPU blocking operation mode Process CMOS technology I/O port General-purpose input/output port (CMOS output): 34 ports(MB90F455/F456/F457, MB90455/456/457) (in- cluding 4 high-current output ports) (When sub clock is not used, 36 ports(MB90F455S/F456S/F457S, MB90455S/456S/457S)) Timer Time-base timer, clock timer, watchdog timer: 1 channel 8/16-bit PPG timer: 8-bit x 4 channels, or 16-bit x 2 channels 16-bit reload timer: 2 channels 16-bit input/output timer - 16-bit free run timer: 1 channel - 16-bit input capture: (ICU): 4 channels Interrupt request is issued upon latching a count value of 16-bit free run timer by detection of an edge on pin input. UART 1: 1 channel Equipped with full-duplex double buffer Clock-asynchronous or clock-synchronous serial transmission is available (Continued) 2