2-Channel, 256-Position
a
Digital Potentiometer
AD5207
FEATURES FUNCTIONAL BLOCK DIAGRAM
256-Position, 2-Channel
A1 W1 B1 A2 W2 B2
Potentiometer Replacement
10 k, 50 k, 100 k
Power Shut-Down, Less than 5 A
SHDN
2.7 V to 5.5 V Single Supply
2.7 V Dual Supply
RDAC1 REGISTER RDAC2 REGISTER
3-Wire SPI-Compatible Serial Data Input
V
DD
R R
Midscale Preset During Power-On
V
SS
APPLICATIONS
LOGIC POWER-
CS
ON
Mechanical Potentiometer Replacement
RESET
8
AD5207
Stereo Channel Audio Level Control
Instrumentation: Gain, Offset Adjustment
CLK
SDO
SERIAL INPUT REGISTER
Programmable Voltage-to-Current Conversion
SDI
Programmable Filters, Delays, Time Constants
DGND
Line Impedance Matching
Automotive Electronics Adjustment
The first two bits are address bits. The following eight bits are
GENERAL DESCRIPTION
the data bits that represent the 256 steps of the resistance value.
The AD5207 provides dual channel, 256-position, digitally
The reason for two address bits instead of one is to be compatible
controlled variable resistor (VR) devices that perform the same
with similar products such as AD8402 so that drop-in replacement
electronic adjustment function as a potentiometer or variable
is possible. The address bit determines the corresponding VR
resistor. Each channel of the AD5207 contains a fixed resistor with
latch to be loaded with the data bits during the returned positive
a wiper contact that taps the fixed resistor value at a point
edge of CS strobe. A serial data output pin at the opposite end
determined by a digital code loaded into the SPI-compatible
of the serial register allows simple daisy chaining in multiple
serial-input register. The resistance between the wiper and either
VR applications without additional external decoding logic.
end point of the fixed resistor varies linearly with respect to the
digital code transferred into the VR latch. The variable resistor
An internal reset block will force the wiper to the midscale posi-
offers a completely programmable value of resistance, between
tion during every power-up condition. The SHDN pin forces an
the A Terminal and the wiper or the B Terminal and the wiper.
open circuit on the A Terminal and at the same time shorts the
The fixed A-to-B terminal resistance of 10 k , 50 k or 100 k
wiper to the B Terminal, achieving a microwatt power shutdown
has a 1% channel-to-channel matching tolerance with a nomi-
state. When SHDN is returned to logic high, the previous latch
nal temperature coefficient of 500 ppm/C. A unique switching
settings put the wiper in the same resistance setting prior to
circuit minimizes the high glitch inherent in traditional switched
shutdown. The digital interface remains active during shutdown;
resistor designs and avoids any make-before-break or break-
code changes can be made to produce new wiper positions when
before-make operation.
the device is resumed from shutdown.
Each VR has its own VR latch, which holds its programmed
The AD5207 is available in 1.1 mm thin TSSOP-14 package,
resistance value. These VR latches are updated from an internal
which is suitable for PCMCIA applications. All parts are guaran-
serial-to-parallel shift register, which is loaded from a standard
teed to operate over the extended industrial temperature range
3-wire serial-input digital interface. Ten bits, to make up the
of 40C to +125C.
data word, are required and clocked into the serial input register.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
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use, nor for any infringements of patents or other rights of third parties that
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may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Fax: 781/326-8703 Analog Devices, Inc., 2001AD5207SPECIFICATIONS
ELECTRICAL CHARACTERISTICS 10 k, 50 k, 100 k VERSION (V = 5 V, V = 0, V = 5 V,
DD SS A
V = 0, 40C < T < +125C unless otherwise noted.)
B A
1
Parameter Symbol Conditions Min Typ Max Unit
DC CHARACTERISTICS
RHEOSTAT MODE
Specifications Apply to All VRs
2
Resistor Differential Nonlinearity R-DNL R , V = NC 1 +1 LSB
WB A
2
Resistor Nonlinearity R-INL R , V = NC 1.5 +1.5 LSB
WB A
3
Nominal Resistor Tolerance R 30 +30 %
Resistance Temperature Coefficient R /TV = V , Wiper = No Connect 500 ppm/C
AB AB DD
Wiper Resistance R I = 1 V/R, V = 5 V 50 100
W W DD
Nominal Resistance Match R/R Ch 1 to 2, V = V , T = 25C 0.2 1 %
O AB DD A
DC CHARACTERISTICS
POTENTIOMETER DIVIDER MODE
Specifications Apply to All VRs
Resolution N 8 Bits
4
Integral Nonlinearity INL 1.5 +1.5 LSB
4
Differential Nonlinearity DNL V = 5 V, V = 0 V 1 +1 LSB
DD SS
Voltage Divider Temperature V / T Code = 80 15 ppm/C
W H
Coefficient
Full-Scale Error V Code = FF 1.5 LSB
WFSE H
Zero-Scale Error V Code = 00 +1.5 LSB
WZSE H
RESISTOR TERMINALS
5
Voltage Range V |V | + |V | 5.5 V V V V
A, B, W DD SS SS DD
6
Capacitance A , B C f = 1 MHz, Measured to GND, Code = 80 45 pF
X X A,B H
6
Capacitance W C f = 1 MHz, Measured to GND, Code = 80 70 pF
X W H
7
Shutdown Current I V = V , V = 0 V, SHDN = 0 5 A
A_SD A DD B
Shutdown Wiper Resistance R V = V , V = 0 V, SHDN = 0, V = 5 V 200
W_SD A DD B DD
Common-Mode Leakage I V = V = V /2 1 nA
CM A B DD
DIGITAL INPUTS AND OUTPUTS
Input Logic High V V = 5 V, V = 0 V 2.4 V
IH DD SS
Input Logic Low V V = 5 V, V = 0 V 0.8 V
IL DD SS
Input Logic High V V = 3 V, V = 0 V 2.1 V
IH DD SS
Input Logic Low V V = 3 V, V = 0 V 0.6 V
IL DD SS
Output Logic High V R = 1 k to V V 0.1 V
OH L DD DD
Output Logic Low V I = 1.6 mA, V = 5 V 0.4 V
OL OL DD
Input Current I V = 0 V or 5 V 10 A
IL IN
6
Input Capacitance C 10 pF
IL
POWER SUPPLIES
Power Single-Supply Range V V = 0 V 2.7 5.5 V
DD RANGE SS
Power Dual-Supply Range V 2.2 2.7 V
DD/SS RANGE
Positive Supply Current I V = V or V = GND, V = 0 V 40 A
DD IH DD IL SS
Negative Supply Current I V = V or V = GND V = 2.5 V 40 A
SS IH DD IL SS
8
Power Dissipation P V = 5 V or V = 0 V, V = 5 V 0.2 mW
DISS IH IL DD
Power Supply Sensitivity, V PSS V = 5 V 10%, V = 0 V, Code = 80 0.01 %/%
DD DD SS H
Power Supply Sensitivity, V PSS V = 2.5 V 10%, V = 2.5 V, Code = 80 0.03 %/%
SS SS DD H
6, 9
DYNAMIC CHARACTERISTICS
Bandwidth 3 dB BW_10 k R = 10 k 600 kHz
AB
Bandwidth 3 dB BW_50 k R = 50 k 125 kHz
AB
Bandwidth 3 dB BW_100 k R = 100 k 71 kHz
AB
Total Harmonic Distortion THD V = 1 V rms, V = 0 V, f = 1 kHz, R = 10 k 0.003 %
W A B AB
V Settling Time t R = 10 k /50 k /100 k , 1 LSB Error Band 2/9/18 s
W S AB
Resistor Noise Voltage e R = 5 k , f = 1 kHz, RS = 0 9 nVHz
N_WB WB
10
Crosstalk C V = 5 V, V = 0 V 65 dB
T A B
2 REV. 0