AS6C6416-55BIN Revision History 4M x 16 bit Low Power CMOS SRAM AS6C6416-55BIN 48ball FBGA PACKAGE Revision Details Date Rev 1.0 Preliminary datasheet June 08 2017 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 11 - Rev.1.0 June. 2017AS6C6416-55BIN FEATURE GENERAL DESCRIPTION n Fast access time : 55ns The AS6C6416-55BIN is a 67,108,864-bit low power CMOS static random access memory organized as n Low power consumption: Operating current : 12mA (TYP.) 4,194,304 words by 16 bits. It is fabricated using very high performance, high reliability CMOS technology. Standby current : 12A (TYP.) Its standby current is stable within the range of n Single 2.7V ~ 3.6V power supply n All inputs and outputs TTL compatible operating temperature. n Fully static operation The AS6C6416-55BIN is well designed for low power n Tri-state output application, and particularly well suited for battery n Data byte control : LB (DQ0 ~ DQ7) back-up nonvolatile memory application. UB (DQ8 ~ DQ15) n Data retention voltage : 1.2V (MIN.) n ROHS Compliant The AS6C6416-55BIN operates from a single power supply of 2.7V ~ 3.6V and all inputs and n Package : 48-ball 8mm x 10mm TFBGA outputs are fully TTL compatible PRODUCT FAMILY Power Dissipation Product Operating V Range Speed CC Family Temperature Operating(I ,TYP.) Standby(I ,TYP. ) CC SB1 AS6C6416-55BIN -40 ~ 85 2.7 ~ 3.6V 55ns 12A 12mA FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION SYMBOL DESCRIPTION Vcc A0 - A21 Address Inputs Vss DQ0 - DQ15 Data Inputs/Outputs CE , CE2 Chip Enable Input 4M x16 A0-A21 DECODER MEMORY ARRAY WE Write Enable Input OE Output Enable Input LB Lower Byte Control UB Upper Byte Control V Power Supply CC V Ground SS DQ0-DQ7 Lower Byte I/O DATA COLUMN I/O CIRCUIT DQ8-DQ15 Upper Byte CE CE2 WE CONTROL OE CIRCUIT LB UB Confidential - 2 of 11 - Rev.1.0 June. 2017