AS29CF010-55CCIN 128K X 8 Bit CMOS 5.0 Volt-only Document Title 128K X 8 Bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory Revision History Rev. No. History Issue Date Remark 1.0 Initial issue July 8, 2019 Preliminary Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 28 - Rev.1.0. July. 2019AS29CF010-55CCIN 128K X 8 Bit CMOS 5.0 Volt-only Features Minimum 100,000 program/erase cycles per sector 5.0V 10% for read and write operations Access times: 20-year data retention at 125C - 55ns(max.) - Reliable operation for the life of the system Current: Compatible with JEDEC-standards - 20 mA typical active read current - Pinout and software compatible with single-power-supply - 30 mA typical program/erase current Flash memory standard -1 A typical CMOS standby - Superior inadvertent write protection Flexible sector architecture Data Polling and toggle bits - 32 KbyteX4 sectors - Provides a software method of detecting completion of - Any combination of sectors can be erased program or erase operations - Supports full chip erase Erase Suspend/Erase Resume - Sector protection: - Suspends a sector erase operation to read data from, or A hardware method of protecting sectors to prevent any program data to, a non-erasing sector, then resumes the inadvertent program or erae s operations within that erase operation sector Package options Embedded Erase Algorithms - 32-pin PLCC - Embedded Erase algorithm wll i automatically erase the Industrial operating temperature range: entire chip or any combination of designated sectors and -40C to 85C verify the erased sectors - Embedded Program algorithm automatically writes and verifies bytes at specified addresses General Description The AS29CF010-55CCIN is a 5.0 volt-only Flash memory operations. Reading dataout of the device is similar to reading from other Flash or EPROM devices. organized as 131,072 bytes of 8 bits each. The 128 Kbytes of data are further divided into four sectors for flexible Device programming occurs yb writing the proper program command sequence. This initiates the Embedded Program sector erase capability. The 8 bits of data appear on I/O0 - I/ O7 while the addresses are input on A0 to A16. The algorithm - an internal algorithm that automatically times the AS29CF010-55CCIN is offered in 32-pin PLCC packages. program pulse widths and verifies proper program margin. This device is designed to be programmed in-system with Device erasure occurs byexecuting the proper erase the standard system 5.0 volt VCC supply. Additional 12.0 volt command sequence. This initiates e thEmbedded Erase VPP is not required for in-system write or erase operations. algorithm - an internal algorithm that automatically However, the preprograms the array (if it is not already programmed) before AS29CF010-55CCIN can also be programmed in executing the erase operaton. i During erase, the device standard EPROM programmers. automatically times the erase pulse widths and verifies proper The AS29CF010-55CCIN has the first toggle bit, I/O6, erase margin. which indicates whether an Embedded Program or Erase is in The host system can detect whether a program or era se progress, or it is in the Erase Suspend. Besides the I/O6 operation is complete by reading the I/O7 (Data Polling) and toggle bit, the AS29CF010-55CCIN has a second toggle bit, I/O6 (toggle) status bits. After a program orerase cycle has I/O2, to indicate whether the addressed sector is being been completed, the device is readto y read array data or selected for erase. The AS29CF010-55CCIN also offers the accept another command. ability to program in the Erase Suspend mode. The standard The sector erase architectureallo ws memory sectors to be AS29CF010-55CCIN offers access times of 55 ns allowing erased and reprogrammed without affecting the data contents high-speed microprocessors to operate without wait states. To of other sectors. The AS29CF010-55CCIN is fully erased eliminate bus contention the device has separate when shipped from the factory. chip enable (CE ), write enable (WE ) and output enable The hardware sector protection feature disables operations ( ) controls. for both program and erase in any combination the of OE The device requires only a single 5.0 volt power supply for sectors of memory. This can be achievedvia programming both read and write functions. Internally generated and equipment. regulated voltages are provided for the program and erase The Erase Suspend feature enables the user to put erase on operations. hold for any period of time to read data from, or program data to, any other sector that isnot selected for erasure. True The AS29CF010-55CCIN is entirely software command set compatible with the JEDEC single-power-supply Flash background erase can thus be achieved. standard. Commands are written to the command Power consumption is greatly reduced when the device is register using standard microprocessor write timings. placed in the standby mode. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write cycles also internallylatch addresses and data needed for the programming and erase Confidential - 2 of 28 - Rev.1.0. July. 2019