A3930 and A3931 Automotive 3-Phase BLDC Controller and MOSFET Driver Features and Benefits Description High current 3-phase gate drive for N-channel MOSFETs The A3930 and A3931 are 3-phase brushless DC (BLDC) motor Synchronous rectification controllers for use with N-channel external power MOSFETs. Cross-conduction protection They incorporate much of the circuitry required to design a Charge pump and top-off charge pump for 100% PWM cost effective three-phase motor drive system, and have been Integrated commutation decoder logic specifically designed for automotive applications. Operation over 5.5 to 50 V supply voltage range A key automotive requirement is functionality over a wide Extensive diagnostics output input supply range. A unique charge pump regulator provides Provides +5 V Hall sensor power adequate (>10 V) gate drive for battery voltages down to 7 V, Low-current sleep mode and allows the device to operate with a reduced gate drive at battery voltages down to 5.5 V. Power dissipation in the charge pump is minimized by switching from a voltage doubling mode at low supply voltage to a dropout mode at the nominal running Package: 48 Lead LQFP with exposed voltage of 14 V. thermal pad (suffix JP) A bootstrap capacitor is used to provide the above-battery supply voltage required for N-channel MOSFETs. An internal charge pump for the high-side drive allows for DC (100% duty cycle) operation. Internal fixed-frequency PWM current control circuitry can be used to regulate the maximum load current. The peak load current limit is set by the selection of an input reference voltage and external sensing resistor. The PWM frequency is set by a user-selected external RC timing network. For added flexibility, the PWM input can be used to provide speed and Continued on the next page Approximate Scale 1:1 Typical Application 3930-DS Rev. 2A3930 and Automotive 3-Phase BLDC Controller and MOSFET Driver A3931 Description (continued) torque control, allowing the internal current control circuit to set combination on the Hall inputs. In this state, the A3930 indicates the maximum current limit. a logic fault, but the A3931 pre-positions the motor in an unstable Efficiency is enhanced by using synchronous rectification. The starting position suitable for start-up algorithms in microprocessor- power FETs are protected from shoot-through by integrated driven sensor-less control systems. crossover control with dead time. The dead time can be set by a Both devices are supplied in a 48-pin LQFP with exposed thermal 2 single external resistor. pad. This is a small footprint (81 mm ) power package, that is lead The A3930 and A3931 only differ in their response to the all-zero (Pb) free, with 100% matte tin leadframe plating. Selection Guide Part Number Option Packing Terminals Package A3930KJP-T Hall short detection 250 pieces/tray A3930KJPTR-T Hall short detection 1500 pieces/reel 48 LQFP surface mount A3931KJP-T Pre-positioning 250 pieces/tray A3931KJPTR-T Pre-positioning 1500 pieces/reel Absolute Maximum Ratings Parameter Symbol Conditions Rating Units Load Supply Voltage V VBB pin 0.3 to 50 V BB V RESET pin input 0.3 to 6 V RESET Logic Input/Output Voltage Remaining logic pins 0.3 to 7 V V GHA, GHB, and GHC pins V to V + 15 V GHx Sx Sx V GLA, GLB, and GLC pins 5 to 16 V GLx V CA, CB, and CC pins V + 15 V Cx Sx Output Voltage Range V SA, SB, and SC pins 5 to 55 V Sx CSP, CSN, and LSS pins 4 to 6.5 V CSO, VDSTH pins 0.3 to 6.5 V VDRAIN pin 0.3 to 55 V Operating Temperature Range (K) T 40 to 150 C A Junction Temperature T 150 C J Overtemperature event not exceed- ing 1 s, lifetime duration not exceed- Transient Junction Temperature T 175 C tJ ing 10 hr guaranteed by design characterization Storage Temperature Range T 55 to 150 C S AEC-Q100-002, all pins except CP1 2000 V ESD Rating, Human Body Model AEC-Q100-002, pin CP1 1000 V ESD Rating, Charged Device Model AEC-Q100-011, all pins 1050 V Allegro MicroSystems, Inc. 2 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000 www.allegromicro.com