S25FL256L/S25FL128L 256 Mbit (32 Mbyte)/128 Mbit (16 Mbyte), 3.0 V FL-L Flash Memory General Description The Cypress FL-L Family devices are Flash non-volatile memory products using: Floating Gate technology 65 nm process lithography The FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO) and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock. The architecture features a Page Programming Buffer that allows up to 256-bytes to be programmed in one operation and provides individual 4KB sector, 32KB half block, 64KB block, or entire chip erase. By using FL-L family devices at the higher clock rates supported, with Quad commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR Flash memories, while reducing signal count dramatically. The FL-L family products offer high densities coupled with the flexibility and fast performance required by a variety of mobile or embedded applications. Provides an ideal storage solution for systems with limited space, signal connections, and power. These memories offer flexibility and performance well beyond ordinary serial flash devices. They are ideal for code shadowing to RAM, executing code directly (XIP), and storing re-programmable data. Features Serial Peripheral Interface (SPI) with Multi-I/O Four Security Regions of 256 bytes each outside the main Flash array Clock polarity and phase modes 0 and 3 Legacy Block Protection: Block range Double Data Rate (DDR) option Individual and Region Protection Quad peripheral Interface (QPI) option Individual Block Lock: Volatile individual Sector/Block Extended Addressing: 24- or 32-bit address options Pointer Region: Non-Volatile Sector/Block range Serial Command subset and footprint compatible with S25FL-A, S25FL1-K, S25FL-P, S25FL-S and S25FS-S SPI families Power Supply Lock-down, Password, or Permanent protection of Security Regions 2 and 3 and Pointer Region Multi I/O Command subset and footprint compatible with S25FL-P, S25FL-S and S25FS-S SPI families Technology Read 65 nm Floating Gate Technology Commands: Normal, Fast, Dual I/O, Quad I/O, DualO, QuadO, Single Supply Voltage with CMOS I/O DDR Quad I/O. 2.7 V to 3.6 V Modes: Burst Wrap, Continuous (XIP), QPI Temperature Range / Grade Serial Flash Discoverable Parameters (SFDP) for configuration Industrial (40C to +85C) information. Industrial Plus (40C to +105C) Program Architecture Extended (40C to +125C) 256 Bytes Page Programming buffer3.0 V FL-L Flash Memory Automotive, AEC-Q100 Grade 3 (40C to +85C) Program suspend and resume Automotive, AEC-Q100 Grade 2 (40C to +105C) Erase Architecture Automotive, AEC-Q100 Grade 1 (40C to +125C) Uniform 4KB Sector Erase Packages (all Pb-free) Uniform 32KB Half Block Erase 8-pin SOIC 208 mil (SOC008) S25FL128L only Uniform 64KB Block Erase WSON 5 6 mm (WND008) S25FL128L only Chip erase WSON 6 8 mm (WNG008) S25FL256L only Erase suspend and resume 16-pin SOIC 300 mil (SO3016) S25FL256L only 100,000 Program/Erase Cycles BGA-24 6 8 mm 20 Year Data Retention 5 5 ball (FAB024) footprint Security features 4 6 ball (FAC024) footprint Status and Configuration Register Protection Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-00124 Rev. *C Revised September 26, 2016S25FL256L/S25FL128L Performance Summary Maximum Read Rates SDR Command Clock Rate (MHz) MBps Read 50 6.25 Fast Read 133 16.5 Dual Read 133 33 Quad Read 133 66 Maximum Read Rates DDR Command Clock Rate (MHz) MBps DDR Quad Read 66 66 Typical Program and Erase Rates Operation KBytes/s Page Programming 854 4 KBytes Sector Erase 80 32 KBytes Half Block Erase 168 64 KBytes Block Erase 237 Typical Current Consumption, 40C to +85C Operation Typical Current Unit Fast Read 5MHz 10 mA Fast Read 10 MHz 10 mA Fast Read 20 MHz 10 mA Fast Read 50 MHz 15 mA Fast Read 108 MHz 25 mA Fast Read 133 MHz 30 mA Quad I/O / QPI Read 108 MHz 25 mA Quad I/O / QPI Read 133 MHz 30 mA Quad I/O / QPI DDR Read 33MHz 15 mA Quad I/O / QPI DDR Read 66MHz 30 mA Program 40 mA Erase 40 mA Standby SPI 20 A Standby QPI 60 A Deep Power Down 2A Document Number: 002-00124 Rev. *C Page 2 of 154